EP9315-CB Cirrus Logic Inc, EP9315-CB Datasheet - Page 189

IC ARM920T MCU 200MHZ 352-PBGA

EP9315-CB

Manufacturer Part Number
EP9315-CB
Description
IC ARM920T MCU 200MHZ 352-PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9315-CB

Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
352-BGA
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9315A-Z
For Use With
598-1144 - KIT DEVELOPMENT EP9315 ARM9
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Other names
598-1261

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DS785UM1
7.3.7 Hardware Cursor
7.4 Functional Details
brightness control. The Bright output signal can also be used for direct pulse width modulated
CCFL brightness control that can be synchronized to the display frame rate.
The Raster Engine provides hardware cursor support. The cursor size is programmable up to
64 pixels wide by 64 pixels in height. The cursor is stored anywhere in memory as a 2 bpp
image. The 2 bpp image pixel information implies transparent, inverted, cursor color 1, or
cursor color 2. The cursor hardware must be supplied this information:
Using this information, the hardware overlays the cursor in the output video stream. Bottom
and right edge clipping is performed by hardware. Some extra calculations and register
setups are required for cursor support during dual scan display mode.
The Raster Engine’s block diagram is shown in
several major sections; VILOSATI, video FIFO, pixel mux, blink logic, color LUT, RGB mux,
output shift logic, grayscale circuitry, hardware cursor logic, YCrCb encoder, and video timing
section. A video stream signature generator is also included for built in self testing.
• Image starting address
• Two cursor colors
• An X screen location and a Y screen location
• A cursor size
Copyright 2007 Cirrus Logic
Raster Engine With Analog/LCD Integrated Timing and Interface
Figure
7-1. The video pipeline consists of
EP93xx User’s Guide
7-7
7

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