C8051F330-GM Silicon Laboratories Inc, C8051F330-GM Datasheet - Page 64

IC 8051 MCU 8K FLASH 20MLP

C8051F330-GM

Manufacturer Part Number
C8051F330-GM
Description
IC 8051 MCU 8K FLASH 20MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F33xr
Datasheets

Specifications of C8051F330-GM

Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
20-QFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F330DK
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
On-chip Dac
1-ch x 10-bit
No. Of I/o's
17
Ram Memory Size
768Byte
Cpu Speed
25MHz
No. Of Timers
4
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1541 - KIT TOOL EVAL SYS IN A USB STICK770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1451 - ADAPTER PROGRAM TOOLSTICK F330336-1346 - DAUGHTER CARD TOOLSTICK F330336-1264 - DEV KIT FOR C8051F330/F331
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1262

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logic 1 upon a Comparator falling-edge occurrence, and the CP0RIF flag is set to logic 1 upon the Com-
parator rising-edge occurrence. Once set, these bits remain set until cleared by software. The Comparator
rising-edge interrupt mask is enabled by setting CP0RIE to a logic 1. The Comparator0 falling-edge inter-
rupt mask is enabled by setting CP0FIE to a logic 1.
The output state of the Comparator can be obtained at any time by reading the CP0OUT bit. The Compar-
ator is enabled by setting the CP0EN bit to logic 1, and is disabled by clearing this bit to logic 0.
Note that false rising edges and falling edges can be detected when the comparator is first powered on or
if changes are made to the hysteresis or response time control bits. Therefore, it is recommended that the
rising-edge and falling-edge flags be explicitly cleared to logic 0 a short time after the comparator is
enabled or its mode bits have been changed. This Power Up Time is specified in Table 8.1 on page 70.
Bit7:
Bit6:
Bit5:
Bit4:
Bits3–2: CP0HYP1–0: Comparator0 Positive Hysteresis Control Bits.
Bits1–0: CP0HYN1–0: Comparator0 Negative Hysteresis Control Bits.
CP0EN
R/W
Bit7
CP0EN: Comparator0 Enable Bit.
0: Comparator0 Disabled.
1: Comparator0 Enabled.
CP0OUT: Comparator0 Output State Flag.
0: Voltage on CP0+ < CP0–.
1: Voltage on CP0+ > CP0–.
CP0RIF: Comparator0 Rising-Edge Flag. Must be cleared by software.
0: No Comparator0 Rising Edge has occurred since this flag was last cleared.
1: Comparator0 Rising Edge has occurred.
CP0FIF: Comparator0 Falling-Edge Flag. Must be cleared by software.
0: No Comparator0 Falling-Edge has occurred since this flag was last cleared.
1: Comparator0 Falling-Edge has occurred.
00: Positive Hysteresis Disabled.
01: Positive Hysteresis = 5 mV.
10: Positive Hysteresis = 10 mV.
11: Positive Hysteresis = 20 mV.
00: Negative Hysteresis Disabled.
01: Negative Hysteresis = 5 mV.
10: Negative Hysteresis = 10 mV.
11: Negative Hysteresis = 20 mV.
CP0OUT
Bit6
R
SFR Definition 8.1. CPT0CN: Comparator0 Control
CP0RIF
R/W
Bit5
CP0FIF CP0HYP1 CP0HYP0 CP0HYN1 CP0HYN0 00000000
R/W
Bit4
Rev. 1.7
R/W
Bit3
R/W
Bit2
C8051F330/1/2/3/4/5
R/W
Bit1
R/W
Bit0
SFR Address:
Reset Value
0x9B
67

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