ST7FLITE29F2M6 STMicroelectronics, ST7FLITE29F2M6 Datasheet - Page 132

IC MCU 8BIT 8K FLASH 20SOIC

ST7FLITE29F2M6

Manufacturer Part Number
ST7FLITE29F2M6
Description
IC MCU 8BIT 8K FLASH 20SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FLITE29F2M6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
ST7FLITE2x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
15
Number Of Timers
4 bit
Operating Supply Voltage
2.4 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLIT2-COS/COM, ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
13 bit
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5049 - KIT STARTER RAISONANCE ST7FLITE497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2135-5

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ST7LITE2
132/133
07-Jul-06
Date
Revision
4
Added 300K read/write cycles for EEPROM on first page
Updated
Added note 2 in “EXTERNAL INTERRUPT CONTROL REGISTER (EICR)” on page 36 and
changed “External Interrupt Function” on page 46
Modified read operation section in “MEMORY ACCESS” on page 16
Added note to
Modified one note in
Modified Table 4, “ST7 Clock Sources,” on page 26
Added note on illegal opcode reset to
Added note to
Changed note below
DLING” on page 18
In
“after an overflow event”).
Added important note to
Changed
changed accordingly)
Added note 1 and modified note 3 in
96
Added “Crystal and Ceramic Resonator Oscillators” on page 102
Changed I
Updated
Added note to
Changed notes 1 and 2 to Table 21, “THERMAL CHARACTERISTICS,” on page 120 and add-
ed R
Changed
in
Added note 2 to opt 4 (option byte 2) in
Modified
Changed
Added
Changed LTICR reset value in Table 2, “Hardware Register Map,” on page 10
Modified “caution” in
Replaced bit1 by bit2 for AWUF bit in AWUCSR description in
Modified
Changed order of
graphs before
Added note 3 to
Modified
values and added note 4. The change made to t
rev B of this product.
Changed t
Added note to
Changed LTCSR2 reset value in
Modified
Added note 1 to the max column in table “ADC Accuracy with VDD=5.0V” on page 116 and
modified the content of this note.
Figure 85 on page 112
section 11.2.6 on page
and changed table titles
thJA
section 16.7 on page 130
value for DIP20 package
section 4.4 on page 13
section 14.2 on page 121
section 14.2 on page 121
section 10.2.1.1 on page 46
section 13.10 on page
Figure 84
Figure
section 13.3.1 on page 93
section 15.3 on page 126
S
w(JIT)
value and note 2 in
section 11.3.4 on page 67
section 7.1 on page 23
section 7.6.1 on page 29
Figure 67 on page 106
section 13.5.2 on page 101
value in
84,
section 13.3.2 on page 94
Section 11.3.3.2
and
Figure 85 on page 112
section 7.1 on page 23
section 8.2 on page 34
Figure 8 on page 17
Figure 85 on page 112
section 13.3.4.1 on page 95
section 11.4.3.3 on page 73
(device works correctly without these components)
60, modified description of OE bits in the PWMCR register (added
section 13.8.1 on page 106
113: changed t
and modified note 5 and
section 11.3.6 on page 67
Description of Changes
and
section 13.3.4.1 on page 95
(f
OSC
section 7.5.1 on page 27
section 11.3.3.3 on page 66
section 15.1 on page 122
and the last paragraph of “ACCESS ERROR HAN-
or f
(and notes) and removed EMC protection circuitry
CLKIN
h(MO)
su(SS)
replaced by f
and t
and
and t
section 13.3.4.2 on page 96
Figure 5
v(MO)
h (SS)
section 9.6.0.1 on page 45
, as well as t
and
CPU
values applies from silicon
section 13.3.4.2 on page
and removed two para-
and frequency values
su(SS)
and t
h (SS)

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