LPC3250FET296/01,5 NXP Semiconductors, LPC3250FET296/01,5 Datasheet - Page 40

• Manufacturer Part Number: LPC3250FET296/01,5
• Description: IC ARM9 MCU 256K 296-TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC32x0r

Specifications of LPC3250FET296/01,5

• Package / Case: 296-TFBGA
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 266MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, Motor Control PWM, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: ROMless
• Ram Size: 256K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 3.6 V
• Data Converters: A/D 3x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC32
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 256 KB
• Interface Type: EMC
• Maximum Clock Frequency: 266 MHz
• Number Of Timers: 6
• Operating Supply Voltage: 1.31 V to 1.39 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, DK-57TS-LPC3250, DK-57VTS-LPC3250, SOMDIMM-LPC3250
• Development Tools By Supplier: OM11016, OM11021, OM11045
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 3 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4962; 935290766551

NXP Semiconductors
LPC3220_30_40_50_1
Preliminary data sheet
7.9.6.1 Features
7.9.7.1 Features
7.9.8.1 Features
7.9.6 High-speed timer
7.9.7 Pulse Width Modulators (PWMs)
7.9.8 Motor control pulse width modulator
The high-speed timer block is clocked by the main peripheral clock. The clock is first
divided down in a 16-bit programmable pre-scale counter which clocks a 32-bit
timer/counter.
The high-speed timer includes three match registers that are compared to the
timer/counter value. A match can generate an interrupt and cause the timer/counter to
either continue to run, stop, or be reset. The high-speed timer also includes two capture
registers that can take a snapshot of the timer/counter value when an input signal
transitions. A capture event may also generate an interrupt.
The LPC3220/30/40/50 provides two simple PWMs. They are clocked separately by either
the main peripheral clock or the 32 kHz RTC clock. Both PWMs have a duty cycle
programmable in 255 steps.
The Motor Control PWM (MCPWM) provides a set of features for three-phase AC and DC
motor control applications in a single peripheral. The MCPWM can also be configured for
use in other generalized timing, counting, capture, and compare applications.
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– set LOW on match
– set HIGH on match
– toggle on match
– do nothing on match
32-bit timer/counter with programmable 16-bit pre-scaler.
Counter or timer operation.
Two 32-bit capture registers.
Three 32-bit match registers that allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
Pause control to stop counting when core is in debug state.
Clocked by the main peripheral clock or the 32 kHz RTC clock.
Programmable 4-bit pre-scaler.
Duty cycle programmable in 255 steps.
Output frequency up to 50 kHz when using a 13 MHz peripheral clock.
32-bit timer
32-bit period register
Rev. 01 — 6 February 2009
LPC3220/30/40/50
16/32-bit ARM microcontrollers
© NXP B.V. 2009. All rights reserved.
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