LPC3250FET296/01,5 NXP Semiconductors, LPC3250FET296/01,5 Datasheet - Page 17

• Manufacturer Part Number: LPC3250FET296/01,5
• Description: IC ARM9 MCU 256K 296-TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC32x0r

Specifications of LPC3250FET296/01,5

• Package / Case: 296-TFBGA
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 266MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, Motor Control PWM, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: ROMless
• Ram Size: 256K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 3.6 V
• Data Converters: A/D 3x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC32
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 256 KB
• Interface Type: EMC
• Maximum Clock Frequency: 266 MHz
• Number Of Timers: 6
• Operating Supply Voltage: 1.31 V to 1.39 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, DK-57TS-LPC3250, DK-57VTS-LPC3250, SOMDIMM-LPC3250
• Development Tools By Supplier: OM11016, OM11021, OM11045
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 3 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4962; 935290766551

NXP Semiconductors
Table 4.
LPC3220_30_40_50_1
Preliminary data sheet
Symbol
SPI1_CLK/
SCK0
SPI1_DATIN/
MISO0/
GPI_25/
MCI1
SPI1_DATIO/
MOSI0/
MCI2
SPI2_CLK/
SCK1/
LCDVD[23]
SPI2_DATIO/
MOSI1/
LCDVD[20]
SPI2_DATIN/
MISO1/
LCDVD[21]/
GPI_27
SYSCLKEN/
LCDVD[15]
SYSX_IN
SYSX_OUT
TS_XP
TS_YP
TST_CLK2
U1_RX/CAP1[0]/
GPI_15
U1_TX
U2_HCTS/
U3_CTS/GPI_16
U2_RX/
U3_DSR/GPI_17
U2_TX/U3_DTR
U3_RX/
GPI_18
Pin description
Pin
C9
C10
B9
B10
A9
A10
G17
T17
R15
R13
U16
C6
K15
K16
J18
K18
K17
J14
…continued
Power supply
domain
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_AD
VDD_AD
VDD_AD
VDD_AD
VDD_IOB
VDD_IOA
VDD_IOA
VDD_IOA
VDD_IOA
VDD_IOA
VDD_IOD
Rev. 01 — 6 February 2009
Type
O
O
I/O
I/O
I/O
I
I/O
I/O
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O T
I/O T
analog in
analog out
I/O
I/O
O
I/O
I/O
I/O
O
I/O
I
I/O
I/O
I/O
I/O
O
O
I/O
I/O
Description
SPI1 clock out
SSP0 clock out
SPI1 data in
SSP0 MISO
General purpose input bit 25
Motor control channel 1 input
SPI1 data out (and optional input)
SSP0 MOSI
Motor control channel 2 input
SPI2 clock out
SSP1 clock out
LCD data bit 23
SPI2 data out (and optional input)
SSP1 MOSI
LCD data bit 20
SPI2 data in
SSP1 MISO
LCD data 21
General purpose input bit 27
Clock request out for external clock source
LCD data bit 15
System clock oscillator input
System clock oscillator output
Touchscreen X output
Touchscreen Y output
Test clock 2 out
HS UART 1 receive
Timer 1 capture input 0
General purpose input bit 15
HS UART 1 transmit
HS UART 2 Clear to Send input
UART 3 Clear to Send
General purpose input bit 16
HS UART 2 receive
UART 3 data set ready
General purpose input bit 17
HS UART 2 transmit
UART 3 data terminal ready out
UART 3 receive
General purpose input bit 18
LPC3220/30/40/50
16/32-bit ARM microcontrollers
© NXP B.V. 2009. All rights reserved.
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