PIC18F448-I/PT Microchip Technology, PIC18F448-I/PT Datasheet - Page 84

• Manufacturer Part Number: PIC18F448-I/PT
• Description: IC PIC MCU FLASH 8KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F448-I/PT

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 33
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI, I2C, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136, DM163011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
• Lead Free Status / Rohs Status: Details

8.2
The Peripheral Interrupt Request (PIR) registers
contain the individual flag bits for the peripheral
interrupts (Register 8-4 through Register 8-6). Due to
the number of peripheral interrupt sources, there are
three Peripheral Interrupt Request (Flag) registers
(PIR1, PIR2, PIR3).
REGISTER 8-4:
DS41159E-page 82
PIC18FXX8
PIR Registers
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
PIR1: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 1
bit 7
PSPIF: Parallel Slave Port Read/Write Interrupt Flag bit
1 = A read or a write operation has taken place (must be cleared in software)
0 = No read or write has occurred
ADIF: A/D Converter Interrupt Flag bit
1 = An A/D conversion completed (must be cleared in software)
0 = The A/D conversion is not complete
RCIF: USART Receive Interrupt Flag bit
1 = The USART receive buffer, RCREG, is full (cleared when RCREG is read)
0 = The USART receive buffer is empty
TXIF: USART Transmit Interrupt Flag bit
1 = The USART transmit buffer, TXREG, is empty (cleared when TXREG is written)
0 = The USART transmit buffer is full
SSPIF: Master Synchronous Serial Port Interrupt Flag bit
1 = The transmission/reception is complete (must be cleared in software)
0 = Waiting to transmit/receive
CCP1IF: CCP1 Interrupt Flag bit
Capture mode:
1 = A TMR1 register capture occurred (must be cleared in software)
0 = No TMR1 register capture occurred
Compare mode:
1 = A TMR1 register compare match occurred (must be cleared in software)
0 = No TMR1 register compare match occurred
PWM mode:
Unused in this mode.
TMR2IF: TMR2 to PR2 Match Interrupt Flag bit
1 = TMR2 to PR2 match occurred (must be cleared in software)
0 = No TMR2 to PR2 match occurred
TMR1IF: TMR1 Overflow Interrupt Flag bit
1 = TMR1 register overflowed (must be cleared in software)
0 = TMR1 register did not overflow
Legend:
R = Readable bit
-n = Value at POR
PSPIF
R/W-0
Note 1: This bit is only available on PIC18F4X8 devices. For PIC18F2X8 devices, this bit
(1)
is unimplemented and reads as ‘0’.
R/W-0
ADIF
RCIF
R-0
W = Writable bit
‘1’ = Bit is set
TXIF
R-0
Note 1: Interrupt flag bits are set when an interrupt
2: User software should ensure the appropri-
SSPIF
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
condition occurs regardless of the state of
its corresponding enable bit or the Global
Interrupt
register).
ate interrupt flag bits are cleared prior to
enabling an interrupt and after servicing
that interrupt.
(1)
CCP1IF
R/W-0
Enable
© 2006 Microchip Technology Inc.
x = Bit is unknown
TMR2IF
bit,
R/W-0
GIE
TMR1IF
(INTCON
R/W-0
bit 0