PIC18F448-I/PT Microchip Technology, PIC18F448-I/PT Datasheet - Page 70

IC PIC MCU FLASH 8KX16 44TQFP

PIC18F448-I/PT

Manufacturer Part Number
PIC18F448-I/PT
Description
IC PIC MCU FLASH 8KX16 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F448-I/PT

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC18
No. Of I/o's
33
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI, I2C, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
33
Number Of Timers
4 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136, DM163011
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F448-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F448-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
6.2.2
The Table Latch (TABLAT) is an 8-bit register mapped
into the SFR space. The Table Latch is used to hold
8-bit data during data transfers between program
memory and data RAM.
6.2.3
The Table Pointer (TBLPTR) addresses a byte within
the program memory. The TBLPTR is comprised of
three SFR registers: Table Pointer Upper Byte, Table
Pointer High Byte and Table Pointer Low Byte
(TBLPTRU:TBLPTRH:TBLPTRL). These three regis-
ters join to form a 22-bit wide pointer. The low-order
21 bits allow the device to address up to 2 Mbytes of
program memory space. The 22nd bit allows access to
the device ID, the user ID and the configuration bits.
The Table Pointer, TBLPTR, is used by the TBLRD and
TBLWT instructions. These instructions can update the
TBLPTR in one of four ways based on the table
operation. These operations are shown in Table 6-1.
These operations on the TBLPTR only affect the
low-order 21 bits.
TABLE 6-1:
FIGURE 6-3:
DS41159E-page 68
PIC18FXX8
TBLRD*+
TBLWT*+
TBLRD*-
TBLWT*-
TBLRD+*
TBLWT+*
Example
TBLRD*
TBLWT*
21
TABLAT – TABLE LATCH REGISTER
TBLPTR – TABLE POINTER
REGISTER
TABLE POINTER OPERATIONS WITH TBLRD AND TBLWT INSTRUCTIONS
TBLPTRU
TABLE POINTER BOUNDARIES BASED ON OPERATION
16
ERASE – TBLPTR<21:6>
15
TBLPTR is incremented before the read/write
TBLPTR is decremented after the read/write
TBLPTR is incremented after the read/write
WRITE – TBLPTR<21:3>
TBLPTRH
READ – TBLPTR<21:0>
Operation on Table Pointer
TBLPTR is not modified
memory block of 8 bytes is written to. For more detail,
6.2.4
TBLPTR is used in reads, writes and erases of the
Flash program memory.
When a TBLRD is executed, all 22 bits of the Table
Pointer determine which byte is read from program
memory into TABLAT.
When a TBLWT is executed, the three LSbs of the Table
Pointer (TBLPTR<2:0>) determine which of the eight
program memory holding registers is written to. When
the timed write to program memory (long write) begins,
the
(TBLPTR<21:3>),
see Section 6.5 “Writing to Flash Program Memory”.
When an erase of program memory is executed, the
16 MSbs of the Table Pointer (TBLPTR<21:6>) point to
the 64-byte block that will be erased. The Least
Significant bits (TBLPTR<5:0>) are ignored.
Figure 6-3 describes the relevant boundaries of
TBLPTR based on Flash program memory operations.
19
8
MSbs
7
TABLE POINTER BOUNDARIES
of
will
TBLPTRL
the
© 2006 Microchip Technology Inc.
determine
Table
Pointer,
which
0
TBLPTR
program

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