PIC32MX440F512H-80I/PT Microchip Technology, PIC32MX440F512H-80I/PT Datasheet - Page 5

• Manufacturer Part Number: PIC32MX440F512H-80I/PT
• Description: IC PIC MCU FLASH 512K 64-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX440F512H-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 64-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 5 x 16 bit, 1 x 32 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 51
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 5
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 2:
© 2010 Microchip Technology Inc.
Note 1:
Comparator
Regulator
Oscillator
Oscillator
Module
PORTS
Voltage
RTCC
UART
UART
UART
JTAG
DMA
DMA
DMA
DMA
PMP
PMP
ADC
SPI
SPI
Only those issues indicated in the last column apply to the current silicon revision.
INT0 Interrupt
Overrun Error
Clock Switch
Trigger from
Slave Mode
Slave Mode
Slave Mode
Conversion
SILICON ISSUE SUMMARY (CONTINUED)
Reference
Feature
Receive
Voltage
Status
UART
Buffer
IrDA
BOR
IrDA
—
—
—
—
—
—
—
—
—
®
Number
Item
48.
49.
50.
51.
52.
53.
54.
55.
56.
57.
58.
59.
60.
61.
62.
63.
64.
65.
66.
Clock source switching may cause a general exception or
a POR when switching from a slow clock to a fast clock.
On 64-pin devices, the TMS pin requires an external pull-up. X
Changing the PB divisor on the fly may generate
exceptions.
A suspend followed by an abort does not reset the DMA
pointers.
Turning off DMA during a transfer may have unintended
results.
The PMP interrupt is generated at the start of the PMP
write.
The IBOV overflow flag may not become set when an
overflow occurs.
The channel event bit may be incorrect after a suspend.
DMA events are not detected during a DMA suspend.
Reads of SPIxBUF when SPIRBF is clear will cause
erroneous SPIRBF behavior.
A wake-up interrupt may not be clearable.
TX data is corrupted when BRG values greater than 0x200
are used.
The IrDA minimum bit time is not detected at all baud
rates.
The RTCC alarm registers are reset by any device Reset.
I/O pins do not tri-state immediately if previously driven
high.
The OERR bit does not get cleared on a module Reset.
The OERR bit retains its value even after the UART
module is reinitialized.
The ADC module conversion triggers occur on the rising
edge of the INT0 signal even when INT0 is configured to
generate an interrupt on the falling edge.
The Internal Voltage Reference (IV
(typical) instead of 0.6V as specified in the device data
sheet electrical specifications.
Device may not exit BOR state if BOR event occurs.
Issue Summary
PIC32MX3XX/4XX
REF
) is set to 1.2V
B2 B3 B4 B6
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
DS80440D-page 5
Revisions
Affected
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
(1)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X