PIC24FJ256GB110-I/PT Microchip Technology, PIC24FJ256GB110-I/PT Datasheet - Page 164

IC PIC MCU FLASH 256K 100TQFP

PIC24FJ256GB110-I/PT

Manufacturer Part Number
PIC24FJ256GB110-I/PT
Description
IC PIC MCU FLASH 256K 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr

Specifications of PIC24FJ256GB110-I/PT

Program Memory Type
FLASH
Program Memory Size
256KB (85.5K x 24)
Package / Case
100-TFQFP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
83
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
84
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM240011 - KIT STARTER MPLAB FOR PIC24F MCUMA240014 - MODULE PLUG-IN PIC24DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
PIC24FJ256GB110 FAMILY
13.3
In PWM mode, the output compare module can be
configured for edge-aligned or center-aligned pulse
waveform generation. All PWM operations are
double-buffered (buffer registers are internal to the
module and are not mapped into SFR space).
To configure the output compare module for PWM
operation:
1.
2.
3.
4.
FIGURE 13-2:
DS39897B-page 162
Trigger and
Sync Sources
OC Clock
Sources
Configure the OCx output for one of the
available Peripheral Pin Select pins.
Calculate the desired duty cycles and load them
into the OCxR register.
Calculate the desired period and load it into the
OCxRS register.
Select the current OCx as the trigger/sync source
by
(OCxCON2<4:0>).
Note 1: The OCx outputs must be assigned to an available RPn pin before use. Please see Section 9.4 “Peripheral
Pulse-Width Modulation (PWM)
Mode
writing
TRIGMODE
SYNCSELx
TRIGSTAT
Pin Select” for more information.
OCTSELx
OCTRIG
0x1F
Trigger and
Sync Logic
OUTPUT COMPARE BLOCK DIAGRAM (DOUBLE-BUFFERED, 16-BIT PWM MODE)
Clock
Select
Reset
to
Match Event
Increment
SYNCSEL<4:0>
Reset
OCxRS buffer
OCxR buffer
Comparator
Comparator
OCxCON1
OCxCON2
Preliminary
OCxTMR
OCxRS
OCxR
Rollover/Reset
Rollover/Reset
5.
6.
7.
8.
Match
Event
Match
Event
Rollover
Note:
Select
OCTSEL2<2:0> (OCxCON<12:10>) bits.
Enable interrupts, if required, for the timer and
output compare modules. The output compare
interrupt is required for PWM Fault pin utilization.
Select the desired PWM mode in the OCM<2:0>
(OCxCON1<2:0>) bits.
If a timer is selected as a clock source, set the
TMRy prescale value and enable the time base by
setting the TON (TxCON<15>) bit.
This peripheral contains input and output
functions that may need to be configured
by
Section 9.4 “Peripheral Pin Select” for
more information.
a
OC Output and
Fault Logic
the
clock
OCx Interrupt
OCMx
OCINV
OCTRIS
FLTOUT
FLTTRIEN
FLTMD
ENFLT0
OCFLT0
peripheral
© 2008 Microchip Technology Inc.
source
by
pin
writing
OCFA/OCFB
select.
OCx Pin
the
See

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