PIC24FJ256GB110-I/PT Microchip Technology, PIC24FJ256GB110-I/PT Datasheet - Page 125

• Manufacturer Part Number: PIC24FJ256GB110-I/PT
• Description: IC PIC MCU FLASH 256K 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256GB110-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 256KB (85.5K x 24)
• Package / Case: 100-TFQFP
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 83
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 84
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARDDM240011 - KIT STARTER MPLAB FOR PIC24F MCUMA240014 - MODULE PLUG-IN PIC24DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

9.4
A major challenge in general purpose devices is provid-
ing the largest possible set of peripheral features while
minimizing the conflict of features on I/O pins. In an
application that needs to use more than one peripheral
multiplexed on a single pin, inconvenient workarounds
in application code or a complete redesign may be the
only option.
The peripheral pin select feature provides an alterna-
tive to these choices by enabling the user’s peripheral
set selection and their placement on a wide range of
I/O pins. By increasing the pinout options available on
a particular device, users can better tailor the
microcontroller to their entire application, rather than
trimming the application to fit the device.
The peripheral pin select feature operates over a fixed
subset of digital I/O pins. Users may independently
map the input and/or output of any one of many digital
peripherals to any one of these I/O pins. Peripheral pin
select is performed in software and generally does not
require the device to be reprogrammed. Hardware
safeguards are included that prevent accidental or
spurious changes to the peripheral mapping once it has
been established.
9.4.1
The peripheral pin select feature is used with a range
of up to 44 pins, depending on the particular device and
its pin count. Pins that support the peripheral pin select
feature include the designation “RPn” or “RPIn” in their
full pin designation, where “n” is the remappable pin
number. “RP” is used to designate pins that support
both remappable input and output functions, while
“RPI” indicates pins that support remappable input
functions only.
PIC24FJ256GB110 family devices support a larger
number of remappable input only pins than remappable
input/output pins. In this device family, there are up to
32 remappable input/output pins, depending on the pin
count of the particular device selected; these are num-
bered RP0 through RP31. Remappable input only pins
are numbered above this range, from RPI32 to RPI43
(or the upper limit for that particular device).
See Table 1-4 for a summary of pinout options in each
package offering.
© 2008 Microchip Technology Inc.
Peripheral Pin Select
AVAILABLE PINS
PIC24FJ256GB110 FAMILY
Preliminary
9.4.2
The peripherals managed by the peripheral pin select
are all digital only peripherals. These include general
serial communications (UART and SPI), general pur-
pose timer clock inputs, timer related peripherals (input
capture and output compare) and external interrupt
inputs. Also included are the outputs of the comparator
module, since these are discrete digital signals.
Peripheral pin select is not available for I
notification inputs, RTCC alarm outputs or peripherals
with analog inputs.
A key difference between pin select and non pin select
peripherals is that pin select peripherals are not asso-
ciated with a default I/O pin. The peripheral must
always be assigned to a specific I/O pin before it can be
used. In contrast, non pin select peripherals are always
available on a default pin, assuming that the peripheral
is active and not conflicting with another peripheral.
9.4.2.1
When a pin selectable peripheral is active on a given
I/O pin, it takes priority over all other digital I/O and dig-
ital communication peripherals associated with the pin.
Priority is given regardless of the type of peripheral that
is mapped. Pin select peripherals never take priority
over any analog functions associated with the pin.
9.4.3
Peripheral pin select features are controlled through
two sets of Special Function Registers: one to map
peripheral inputs, and one to map outputs. Because
they are separately controlled, a particular peripheral’s
input and output (if the peripheral has both) can be
placed on any selectable function pin without
constraint.
The association of a peripheral to a peripheral
selectable pin is handled in two different ways,
depending on if an input or an output is being mapped.
AVAILABLE PERIPHERALS
CONTROLLING PERIPHERAL PIN
SELECT
Peripheral Pin Select Function
Priority
DS39897B-page 123
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