PIC18F97J60-I/PF Microchip Technology, PIC18F97J60-I/PF Datasheet - Page 2

• Manufacturer Part Number: PIC18F97J60-I/PF
• Description: IC PIC MCU FLASH 65KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F97J60-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver/Ethernet/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 41.667 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100DM163024 - BOARD DEMO PICDEM.NET 2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F97J60 FAMILY
2. Module: I/O (PORTJ)
DS80433C-page 2
When configured to operate in Microcontroller
mode (CONFIG3L<EMB1:0> = 11), PORTJ pins
do not go to a high-impedance state immediately
after a POR Reset. Instead, PORTJ<4,0> are
driven low, while all other PORTJ pins are driven
high, until the device exits the Reset condition
(refer to Section 4.6.1 “Time-out Sequence” of
the Device Data Sheet for details on when the
device exits the Reset condition) before transition-
ing to a high-impedance state. Note that since
MCLR and BOR Resets are also treated as a
POR Reset (see Errata Issue #1), PORTJ pins will
also be driven as outputs until the device exits
these Reset conditions.
Work around
If using a PORTJ pin as an input, make sure to
check that your circuit will not create a short-circuit
condition during a Reset. For example, if you
need to have a direct pull-down to ground input,
do this on PORTJ<4> or PORTJ<0>, since they
are temporary driven low. If using a PORTJ pin as
an output, then use a pin that will temporarily drive
low for driving active-high loads, and use a pin
that temporarily will drive high for driving
active-low loads. This way, the temporary output
signals are in the Idle state.
Affected Silicon Revisions
A0
Note:
X
A1
X
This issue is only applicable to the
100-pin device.
A2
X
A3
X
3. Module: I/O (PORTJ) and External
In
(CONFIG3L<EMB1:0> = 00, 01 or 10), each
control signal on PORTJ is supposed to be
driven to its Idle state. However, the control sig-
nals on PORTJ pins go to a high-impedance
state for a brief interval after a MCLR Reset. The
brief loss of control signals may cause the cor-
ruption of data in memory devices connected to
the External Memory Bus (EMB).
Work around
To maintain the default states on the control
lines, use pull-up or pull-down resistors on all
PORTJ pins (pull-down on PORTJ<4,0>, pull-up
on all others).
Affected Silicon Revisions
A0
Note:
X
an
A1
X
Memory Bus
Extended
This issue is only applicable to the
100-pin device.
A2
X
 2010 Microchip Technology Inc.
A3
X
Microcontroller
mode