PIC18F2320-I/SO Microchip Technology, PIC18F2320-I/SO Datasheet - Page 10

IC MCU FLASH 4KX16 EEPROM 28SOIC

PIC18F2320-I/SO

Manufacturer Part Number
PIC18F2320-I/SO
Description
IC MCU FLASH 4KX16 EEPROM 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2320-I/SO

Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI, I2C, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
2 x 8 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, ICE2000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Package
28SOIC W
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL
Lead Free Status / Rohs Status
 Details
PIC18FX220/X320
3.0
3.1
The term “Blank Check” means to verify that the device
has no programmed memory cells. All memories must
be verified: code memory, data EEPROM, ID locations
and Configuration bits. The Device ID registers
(3FFFFEh:3FFFFFh) should be ignored.
A “blank” or “erased” memory cell will read as ‘1’.
So, “Blank Checking” a device merely means to
verify that all bytes read as FFh except the
Configuration bits. Unused (reserved) Configuration
bits will read as ‘0’ (programmed). Refer to Table 5-2
for blank configuration expected data for the various
devices.
If it is determined that the device is not blank, then the
device should be Bulk Erased (see Section 3.2 “High-
Voltage ICSP Bulk Erase”) before any attempt to
program is made.
Given that “Blank Checking” is merely code and data
EEPROM verification, with FFh as the expected data,
refer to Section 4.1 “Read Data EEPROM Memory”
and Section 4.3 “Verify Code Memory and ID
Locations” for implementation details.
FIGURE 3-1:
DS39592F-page 10
Blank Check Device
Blank Check Device
DEVICE PROGRAMMING
Blank Check
Bulk Erase Device
device
blank?
blank?
device
Abort
Start
Is
Is
No
No
BLANK CHECK FLOW
Yes
Yes
Continue
Continue
3.2
Erasing code or data EEPROM is accomplished by
writing an “erase option” to address 3C0004h. Code
memory may be erased, portions at a time, or the user
may erase the entire device in one action. “Bulk Erase”
operations will also clear any code-protect settings
associated with the memory block erased. Erase
options are detailed in Table 3-1.
TABLE 3-1:
The actual Bulk Erase function is a self-timed
operation. Once the erase has started (falling edge of
the 4th PGC after the write command), serial execution
will cease until the erase completes (parameter P11).
During this time, PGC may continue to toggle, but PGD
must be held low.
The code sequence to erase the entire device is shown
in Table 3-2 and the flowchart is shown in Figure 3-2.
TABLE 3-2:
Chip Erase
Erase Data EEPROM
Erase Boot Block
Erase Block 0
Erase Block 1
Erase Block 2
Erase Block 3
Command
Note:
0000
0000
0000
0000
0000
0000
1100
0000
0000
4-Bit
High-Voltage ICSP Bulk Erase
A Bulk Erase is the only way to reprogram
code-protect bits from an ON state to an
OFF state.
Payload
Description
0E 3C
6E F8
0E 00
6E F7
0E 04
6E F6
00 80
00 00
00 00
Data
BULK ERASE OPTIONS
BULK ERASE COMMAND
SEQUENCE
MOVLW 3Ch
MOVWF TBLPTRU
MOVLW 00h
MOVWF TBLPTRH
MOVLW 04h
MOVWF TBLPTRL
Write 80h TO 3C0004h to
erase entire device.
NOP
Hold PGD low until
erase completes.
 2010 Microchip Technology Inc.
Core Instruction
Data
83h
88h
89h
8Ah
8Bh
80h
81h

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