PIC18F26K20-I/SP Microchip Technology, PIC18F26K20-I/SP Datasheet - Page 424

• Manufacturer Part Number: PIC18F26K20-I/SP
• Description: IC PIC MCU FLASH 32KX16 28-DIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K20-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 64KB (32K x 16)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: CCP/ECCP/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• Package: 28SPDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 64 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2XK20/4XK20
RESET ............................................................................. 341
Reset State of Registers .................................................... 56
Resets ........................................................................ 49, 295
RETFIE ............................................................................ 342
RETLW ............................................................................. 342
RETURN .......................................................................... 343
Return Address Stack ........................................................ 64
Return Stack Pointer (STKPTR) ........................................ 65
Revision History ............................................................... 413
RLCF ................................................................................ 343
RLNCF ............................................................................. 344
RRCF ............................................................................... 344
RRNCF ............................................................................. 345
S
SCK .................................................................................. 191
SDI ................................................................................... 191
SDO ................................................................................. 191
SEC_IDLE Mode ................................................................ 45
SEC_RUN Mode ................................................................ 42
Serial Clock, SCK ............................................................. 191
Serial Data In (SDI) .......................................................... 191
Serial Data Out (SDO) ..................................................... 191
Serial Peripheral Interface. See SPI Mode.
SETF ................................................................................ 345
Shoot-through Current ..................................................... 183
Single-Supply ICSP Programming.
Slave Select (SS) ............................................................. 191
Slave Select Synchronization ........................................... 197
SLEEP .............................................................................. 346
Sleep
Sleep Mode ........................................................................ 43
Slew Rate ......................................................................... 136
SLRCON Register ............................................................ 136
Software Simulator (MPLAB SIM) .................................... 362
DS41303D-page 422
PIE1 (Peripheral Interrupt Enable 1) ........................ 112
PIE2 (Peripheral Interrupt Enable 2) ........................ 113
PIR1 (Peripheral Interrupt Request 1) ..................... 110
PIR2 (Peripheral Interrupt Request 2) ..................... 111
PSTRCON (Pulse Steering Control) ........................ 185
PWM1CON (Enhanced PWM Control) .................... 184
RCON (Reset Control) ....................................... 50, 116
RCON (Reset control) .............................................. 116
RCSTA (Receive Status and Control) ...................... 243
SLRCON (PORT Slew Rate Control) ....................... 136
SSPADD (MSSP Address and Baud Rate,
SSPCON1 (MSSP Control 1, I
SSPCON1 (MSSP Control 1, SPI Mode) ................. 193
SSPCON2 (MSSP Control 2, I
SSPMSK (SSP Mask) .............................................. 211
SSPSTAT (MSSP Status, SPI Mode) .............. 192, 202
STATUS ..................................................................... 80
STKPTR (Stack Pointer) ............................................ 65
T0CON (Timer0 Control) .......................................... 153
T1CON (Timer1 Control) .......................................... 157
T2CON (Timer2 Control) .......................................... 165
T3CON (Timer3 Control) .......................................... 167
TRISE (PORTE/PSP Control) .................................. 132
TXSTA (Transmit Status and Control) ..................... 242
WDTCON (Watchdog Timer Control) ....................... 305
Brown-out Reset (BOR) ........................................... 295
Oscillator Start-up Timer (OST) ............................... 295
Power-on Reset (POR) ............................................ 295
Power-up Timer (PWRT) ......................................... 295
OSC1 and OSC2 Pin States ...................................... 34
SPI Mode) ........................................................ 201
2
2
C Mode) ................. 203
C Mode) ................. 204
Preliminary
SPBRG ............................................................................ 245
SPBRGH .......................................................................... 245
Special Event Trigger ...................................................... 265
Special Event Trigger. See Compare (ECCP Mode).
Special Event Trigger. See Compare (ECCP Module).
Special Features of the CPU ........................................... 295
Special Function Registers ................................................ 75
SPI Mode (MSSP)
SSPADD Register ............................................................ 201
SSPCON1 Register ................................................. 193, 203
SSPCON2 Register ......................................................... 204
SSPMSK Register ........................................................... 211
SSPOV ............................................................................ 223
SSPOV Status Flag ......................................................... 223
SSPSTAT Register .................................................. 192, 202
Stack Full/Underflow Resets .............................................. 66
Standard Instructions ....................................................... 311
STATUS Register .............................................................. 80
STKPTR Register .............................................................. 65
SUBFSR .......................................................................... 357
SUBFWB ......................................................................... 346
SUBLW ............................................................................ 347
SUBULNK ........................................................................ 357
SUBWF ............................................................................ 347
SUBWFB ......................................................................... 348
SWAPF ............................................................................ 348
T
T0CON Register .............................................................. 153
T1CON Register .............................................................. 157
T2CON Register .............................................................. 165
T3CON Register .............................................................. 167
Table Pointer Operations (table) ........................................ 90
Table Reads/Table Writes ................................................. 66
TBLRD ............................................................................. 349
TBLWT ............................................................................. 350
Time-out in Various Situations (table) ................................ 53
Timer0 .............................................................................. 153
......................................................................................... 191
Map ............................................................................ 76
Associated Registers ............................................... 199
Bus Mode Compatibility ........................................... 199
Effects of a Reset .................................................... 199
Enabling SPI I/O ...................................................... 195
Master Mode ............................................................ 196
Master/Slave Connection ......................................... 195
Operation ................................................................. 194
Operation in Power Managed Modes ...................... 199
Serial Clock .............................................................. 191
Serial Data In ........................................................... 191
Serial Data Out ........................................................ 191
Slave Mode .............................................................. 197
Slave Select ............................................................. 191
Slave Select Synchronization .................................. 197
SPI Clock ................................................................. 196
Typical Connection .................................................. 195
R/W Bit ............................................................ 205, 206
Associated Registers ............................................... 155
Operation ................................................................. 154
Overflow Interrupt .................................................... 155
Prescaler ................................................................. 155
Prescaler Assignment (PSA Bit) .............................. 155
Prescaler Select (T0PS2:T0PS0 Bits) ..................... 155
Prescaler. See Prescaler, Timer0.
Reads and Writes in 16-Bit Mode ............................ 154
Source Edge Select (T0SE Bit) ............................... 154
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