PIC18F26K20-I/SP Microchip Technology, PIC18F26K20-I/SP Datasheet - Page 41

• Manufacturer Part Number: PIC18F26K20-I/SP
• Description: IC PIC MCU FLASH 32KX16 28-DIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K20-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 64KB (32K x 16)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: CCP/ECCP/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• Package: 28SPDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 64 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 2-9:
TABLE 2-3:
© 2008 Microchip Technology Inc.
CONFIG1H
INTCON
OSCCON
OSCTUNE
PIE2
PIR2
IPR2
Legend:
Note 1:
Clock Monitor Output
Name
Sample Clock
Note:
x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by oscillators.
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
GIE/GIEH PEIE/GIEL TMR0IE
OSCFIF
INTSRC
OSCFIE
OSCFIP
OSCFIF
System
IDLEN
Output
IESO
Bit 7
Clock
(Q)
SUMMARY OF REGISTERS ASSOCIATED WITH CLOCK SOURCES
The system clock is normally at a much higher frequency than the sample clock. The relative frequencies in
this example have been chosen for clarity.
FSCM TIMING DIAGRAM
FCMEN
PLLEN
IRCF2
C1IE
Bit 6
C1IF
—
IRCF1
TUN5
Bit 5
C2IE
C2IF
—
—
Test
INT0IE
IRCF0
TUN4
Bit 4
EEIE
EEIF
—
—
Preliminary
FOSC3
BCLIE
BCLIF
OSTS
TUN3
RBIE
Bit 3
—
TMR0IF
HLVDIE
HLVDIF
FOSC2
PIC18F2XK20/4XK20
TUN2
IOFS
Bit 2
—
Test
TMR3IE
TMR3IF
Oscillator
Failure
FOSC1
INT0IF
SCS1
TUN1
Bit 1
—
CCP2IE
CCP2IF
FOSC0
SCS0
TUN0
RBIF
Bit 0
—
Detected
0000 000x
0011 q000
0000 0000
0000 0000
0000 0000
1111 1111
POR, BOR
Value on
Failure
—
Test
DS41303D-page 39
0000 000x
0011 q000
000u uuuu
0000 0000
0000 0000
1111 1111
Value on
Resets
all other
—
(1)