PIC18F13K22-I/ML Microchip Technology, PIC18F13K22-I/ML Datasheet - Page 191

• Manufacturer Part Number: PIC18F13K22-I/ML
• Description: IC MCU 8BIT 8KB FLASH 20-QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F13K22-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, MSSP, SPI, USART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

15.3
The Baud Rate Generator (BRG) is an 8-bit or 16-bit
timer that is dedicated to the support of both the
asynchronous and synchronous EUSART operation.
By default, the BRG operates in 8-bit mode. Setting the
BRG16 bit of the BAUDCON register selects 16-bit
mode.
The SPBRGH:SPBRG register pair determines the
period of the free running baud rate timer. In
Asynchronous mode the multiplier of the baud rate
period is determined by both the BRGH bit of the TXSTA
register and the BRG16 bit of the BAUDCON register. In
Synchronous mode, the BRGH bit is ignored.
Table 15-3 contains the formulas for determining the
baud rate. Example 15-1 provides a sample calculation
for determining the baud rate and baud rate error.
Typical baud rates and error values for various
asynchronous modes have been computed for your
convenience and are shown in Table 15-5. It may be
advantageous to use the high baud rate (BRGH = 1),
or the 16-bit BRG (BRG16 = 1) to reduce the baud rate
error. The 16-bit BRG mode is used to achieve slow
baud rates for fast oscillator frequencies.
Writing a new value to the SPBRGH, SPBRG register
pair causes the BRG timer to be reset (or cleared). This
ensures that the BRG does not wait for a timer overflow
before outputting the new baud rate.
TABLE 15-3:
TABLE 15-4:
 2010 Microchip Technology Inc.
Legend:
BAUDCON ABDOVF
RCSTA
SPBRG
SPBRGH
TXSTA
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the BRG.
Name
SYNC
0
0
0
0
1
1
EUSART Baud Rate Generator
(BRG)
x = Don’t care, n = value of SPBRGH, SPBRG register pair
Configuration Bits
EUSART Baud Rate Generator Register, Low Byte
EUSART Baud Rate Generator Register, High Byte
SPEN
CSRC
Bit 7
BAUD RATE FORMULAS
REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
BRG16
0
0
1
1
0
1
RCIDL
Bit 6
RX9
TX9
BRGH
0
1
0
1
x
x
DTRXP
SREN
TXEN
Bit 5
CKTXP
CREN
SYNC
Bit 4
Preliminary
BRG/EUSART Mode
16-bit/Asynchronous
16-bit/Asynchronous
16-bit/Synchronous
8-bit/Asynchronous
8-bit/Asynchronous
8-bit/Synchronous
PIC18F1XK22/LF1XK22
ADDEN
SENDB
BRG16
Bit 3
If the system clock is changed during an active receive
operation, a receive error or data loss may result. To
avoid this problem, check the status of the RCIDL bit to
make sure that the receive operation is Idle before
changing the system clock.
EXAMPLE 15-1:
Calculated Baud Rate
For a device with F
of 9600, Asynchronous mode, 8-bit BRG:
Solving for SPBRGH:SPBRG:
Desired Baud Rate
BRGH
FERR
Bit 2
—
Error
X =
OERR
TRMT
WUE
Bit 1
OSC
=
=
=
=
=
=
=
(
CALCULATING BAUD
RATE ERROR
(
Calc. Baud Rate Desired Baud Rate
------------------------------------------------------------------------------------------- -
-------------------------------------------------------------------- -
64 [SPBRGH:SPBRG]

9615

----------------------------------
-------------------------- -
64 25
16000000
25.042
9615 9600
of 16 MHz, desired baud rate
16,000,000
64* 9600

F
64* (Desired Baud Rate)

OSC
Baud Rate Formula
9600
–
ABDEN
+
F
F
F
RX9D
TX9D

Desired Baud Rate
Bit 0
OSC
OSC
1
OSC
=

F
25
/[64 (n+1)]
/[16 (n+1)]
OS C
/[4 (n+1)]

DS41365D-page 191
=
–
0.16%
Reset Values
)
-1
on page
+
259
259
259
259
259
1

)
-1