cy62128ev30 Cypress Semiconductor Corporation., cy62128ev30 Datasheet
cy62128ev30
Manufacturer Part Number
cy62128ev30
Description
Mobl 1 Mbit 128k X 8 Static Ram
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
1.CY62128EV30.pdf
(11 pages)
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Features
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Cypress Semiconductor Corporation
Document #: 38-05579 Rev. *D
Note
1. For best practice recommendations, refer to the Cypress application note “System Design Guidelines” at
Very high speed: 45 ns
❐
Wide voltage range: 2.20V – 3.60V
Pin compatible with CY62128DV30
Ultra low standby power
❐
❐
Ultra low active power
❐
Easy memory expansion with CE
Automatic power down when deselected
CMOS for optimum speed and power
Offered in Pb-free 32-pin SOIC, 32-pin TSOP I, and 32-pin
STSOP packages
Temperature ranges:
• Industrial: –40°C to +85°C
• Automotive-A: –40°C to +85°C
• Automotive-E: –40°C to +125°C
Typical standby current: 1 μA
Maximum standby current: 4 μA
Typical active current: 1.3 mA @ f = 1 MHz
Logic Block Diagram
CE 1
CE 2
WE
OE
A 0
A 1
A 2
A 3
A 4
A 5
A 6
A 7
A 8
A 9
A 10
A 11
1
, CE
2
and OE features
•
198 Champion Court
COLUMN DECODER
INPUT BUFFER
MoBL® 1 Mbit (128K x 8) Static RAM
128K x 8
ARRAY
Functional Description
The CY62128EV30
module organized as 128K words by 8 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption when addresses are not toggling. Placing the
device into standby mode reduces power consumption by more
than 99% when deselected (CE
input and output pins (IO
impedance state when the device is deselected (CE
CE
operation is in progress (CE
LOW).
To write to the device, take Chip Enable (CE
HIGH) and Write Enable (WE) inputs LOW. Data on the eight IO
pins is then written into the location specified on the Address pin
(A
To read from the device, take Chip Enable (CE
HIGH) and Output Enable (OE) LOW while forcing Write Enable
(WE) HIGH. Under these conditions, the contents of the memory
location specified by the address pins appear on the IO pins.
POWER
DOWN
0
2
through A
LOW), the outputs are disabled (OE HIGH), or a write
•
San Jose
16
).
http://www.cypress.com.
[1]
,
is a high performance CMOS static RAM
CA 95134-1709
0
through IO
1
1
LOW and CE
HIGH or CE
IO 4
IO 0
IO 1
IO 2
IO 3
IO 5
IO 6
IO 7
Revised March 28, 2008
CY62128EV30
7
) are placed in a high
•
2
2
1
LOW). The eight
1
HIGH and WE
LOW and CE
LOW and CE
408-943-2600
®
) in portable
1
HIGH or
2
2
[+] Feedback
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