AD7243 Analog Devices, AD7243 Datasheet
AD7243
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AD7243 Summary of contents
Page 1
... DIP and 16-lead SOIC packages. PRODUCT HIGHLIGHTS 1. Complete 12-Bit DACPORT ® The AD7243 is a complete, voltage output, 12-bit DAC on a single chip. The single chip design is inherently more reliable than multichip designs. 2. Single or Dual Supply Operation. 3. Minimum 3-wire interface to most DSP processors. ...
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... AD7243–SPECIFICATIONS 2 Parameter A STATIC PERFORMANCE Resolution 12 ± Relative Accuracy ± 0.9 3 Differential Nonlinearity ± Unipolar Offset Error ± Bipolar Zero Error ± Full-Scale Error ± Full-Scale Temperature Coefficient REFERENCE OUTPUT Reference Output Range, REFOUT 4.95/5.05 ± Reference Temperature Coefficient Reference Load Change (∆ ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7243 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... It is measured after allowing for zero and full-scale errors and is expressed in LSBs percentage of full-scale reading. Single Supply Linearity and Gain Error The output amplifier on the AD7243 can have true negative off- sets even when the part is operated from a single +15 V supply. However, because the negative supply rail (V put cannot actually go negative ...
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... Instead, linearity of the AD7243 in the unipolar mode is measured between full scale and the lowest code which is guaranteed to produce a positive output voltage. ...
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... With DCEN at Logic 0 the standalone mode is selected. In this mode a low SYNC input provides the frame synchronization signal which tells the AD7243 that valid serial data on the SDIN input will be available for the next 16 falling edges of SCLK. An internal counter/decoder circuit provides a low gating signal so that only 16 data bits are clocked into the input shift register ...
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... SDO line. By connecting this line to the SDIN input on the next AD7243 in the chain, a multi-DAC interface may be constructed. Sixteen SCLK pulses are required for each DAC in the system. Therefore, the total number of clock cycles must equal 16N where N is the total number of devices in the chain ...
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... Dual supplies may be used to improve settling time and give increased current sink capability for the amplifier. Figure 9 shows the connection diagram for unipolar operation of the AD7243. Table I shows the digital code vs. analog output for this configuration ...
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... The data transfer is initiated by TFS going low. Data from the ADSP-2101/ADSP-2102 is clocked into the AD7243 on the falling edge of SCLK. When the data transfer is complete, TFS is taken high. In the interface shown the DAC is updated using an external timer which generates an LDAC pulse ...
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... The 87C51 transmits its serial data in 8-bit bytes with only eight falling clock edges occurring in the transmit cycle. To load data to the AD7243, P3.3 is left low after the first eight bits are trans- ferred and a second byte of data is then transferred serially to the AD7243. When the second serial transfer is complete, the P3.3 line is taken high ...
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... In many process control type applications it is necessary to pro- vide an isolation barrier between the controller and the unit be- ing controlled. Opto-isolators can provide voltage isolation in excess of 3 kV. The serial loading structure of the AD7243 makes it ideal for opto-isolated interfaces as the number of in- terface lines is kept to a minimum. ...
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... AD7243 0.18 (4.57) 0.200 (5.08) MAX 0.022 (0.558) 0.014 (0.356) 16 0.300 (7.62) 0.292 (7.42) 1 0.011 (0.279) 0.004 (0.102) STANDOFF 0.050 (1.27) REF OUTLINE DIMENSIONS Dimensions shown in inches and (mm). Plastic DIP (N-16 0.25 0.31 (6.35) (7.87 0.87 (22.1) MAX 0.035 (0.89) 0.125 (3.18) MIN 0.033 (0.84) 0.1 (2.54) 0.018 (0.46) Cerdip (Q-16 0.310 (7.87) TOP VIEW 0.220 (5.59) (Not to Scale 0.840 (21.34) MAX ...