CA3306CE Intersil, CA3306CE Datasheet
CA3306CE
Specifications of CA3306CE
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CA3306CE Summary of contents
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... Optical Character Recognition • Radar Pulse Analysis • Motion Signature Analysis • Robot Vision Part Number Information PART NUMBER LINEARITY (INL, DNL) ±0.5 LSB CA3306E ±0.5 LSB CA3306CE ±0.5 LSB CA3306M ±0.5 LSB CA3306CM ±0.5 LSB CA3306D ±0.5 LSB CA3306CD ± ...
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Functional Block Diagram V IN φ 1 R/2 φ REF ≅ 120Ω R REF CENTER REF R/2 ≅ 50kΩ CLOCK PHASE ZENER 6.2V NOMINAL DIODE V SS Typical Application Circuit ...
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Absolute Maximum Ratings DC Supply Voltage Range Voltage Referenced to V Terminal . . . . . . . . . . . -0.5V to +8.5V SS Input Voltage Range All Inputs Except Zener ...
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Electrical Specifications CA3306A, 10MHz for CA3306C (Continued) PARAMETER ANALOG INPUTS Positive Full Scale Input Range Negative Full Scale Input Range Input Capacitance Input Current INTERNAL VOLTAGE REFERENCE Zener Voltage Zener Dynamic Impedance Zener Temperature Coefficient ...
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Timing Waveforms COMPARATOR DATA IS LATCHED CLOCK IF PHASE IS HIGH CLOCK IF PHASE IS LOW DATA CE1 CE2 t DIS BITS 1-6 DATA OF CA3306, CA3306A, CA3306C DECODED DATA IS SHIFTED TO OUTPUT REGISTERS φ φ ...
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Timing Waveforms SAMPLE ENDS φ 1 φ CLOCK 2 t OLD DATA OUTPUT FIGURE 3A. φ CLOCK 2 OLD DATA OUTPUT Typical Performance Curves REF ...
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Typical Performance Curves 0. 4.8V A REF 0.30 DD 0.25 INTEGRAL 0.20 0.15 DIFFERENTIAL 0.10 0.05 0 0.1 1 CLOCK FREQUENCY (MHz) FIGURE 6. TYPICAL NON-LINEARITY AS A FUNCTION OF ...
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Typical Performance Curves REF SINE WAVE REF CLK/2 30 DECODER 25 LIMITED ...
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Typical Performance Curves 6.00 5.70 5.40 5.10 4.80 4.50 4.20 3.90 3.60 3.30 3.00 0.00 Pin Descriptions PIN NUMBER DIP SOIC NAME CE2 6 ...
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CE1 Don’t care (NOTE 1) INPUT VOLTAGE V V REF REF 6.40 5.12 CODE DESCRIPTION (V) (V) Zero 0.00 0.00 1 LSB 0.10 0.08 2 LSB 0.20 0.16 • • • • Full ...
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Device Operation A sequential parallel technique is used by the CA3306 converter to obtain its high speed operation. The sequence consists of the “Auto Balance” phase φ1 and the “Sample Unknown” phase φ2. (Refer to the circuit diagram.) Each conversion ...
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The CA3306 outputs a short (less than 10ns) current spike several mA amplitude (See Typical Performance Curves) at the beginning of the sample phase. (To a lesser extent, a spike also appears at the beginning of auto ...
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... RMS value of the measured input signal. Operating and Handling Considerations HANDLING All inputs and outputs of Intersil CMOS devices have a network for electrostatic protection during handling. Recom- mended handling practices for CMOS devices are described in AN6525. “Guide to Better Handling and Operation of CMOS Integrated Circuits.” ...
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Application Circuits V+ 1K CLOCK INPUT 0.1µF ADJUST POT 0.1µF FIGURE 17. TYPICAL CA3306 7-BIT RESOLUTION CONFIGURATION CA3306, CA3306A, CA3306C 0.1µ CA3306 ...
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Application Circuits (Continued) V+ CLOCK INPUT 0.1µF ADJUST POT 0.1µF FIGURE 18. TYPICAL CA3306 6-BIT RESOLUTION CONFIGURATION WITH DOUBLE SAMPLING RATE CAPABILITY CA3306, CA3306A, CA3306C ...
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Application Circuits (Continued) S/ ∑ FIGURE 19. TYPICAL CA3306, 800ns, 12-BIT ADC SYSTEM B6’ NO. 1 6-BIT FLASH B1’ ADC 6-BIT DAC (12 BIT ACCURACY) X32 B6 NO. 2 6-BIT FLASH B1 ADC B7 NO. 3 ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...