EVAL-ADT7483AEB ON Semiconductor, EVAL-ADT7483AEB Datasheet - Page 18

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EVAL-ADT7483AEB

Manufacturer Part Number
EVAL-ADT7483AEB
Description
BOARD EVALUATION FOR ADT7483
Manufacturer
ON Semiconductor
Type
Temperature Sensorr
Datasheet

Specifications of EVAL-ADT7483AEB

Contents
Evaluation Board
For Use With/related Products
ADT7483
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
ADT7483A
write operation contains a second data byte that is written to the
register selected by the address pointer register (see Figure 16).
The device address is sent over the bus followed by R/W set
to 0. This is followed by two data bytes. The first data byte is
SCL
When reading data from a register there are two possibilities:
SCL
SCL
SDA
SDA
SDA
START BY
START BY
START BY
MASTER
MASTER
MASTER
If the address pointer register value of the ADT7483A is
unknown or not the desired value, it is first necessary to set
it to the correct value before data can be read from the
desired data register. This is done by performing a write to
the ADT7483A as before, but only the data byte containing
the register read address is sent, as data is not to be written
to the register (see Figure 17).
1
1
1
1
1
1
0
0
0
Figure 16. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register
0
0
0
SERIAL BUS ADDRESS BYTE
SERIAL BUS ADDRESS BYTE
SERIAL BUS ADDRESS BYTE
1
1
1
FRAME 1
FRAME 1
FRAME 1
1
1
1
Figure 17. Writing to the Address Pointer Register Only
Figure 18. Reading from a Previously Selected Register
SCL (CONTINUED)
SDA (CONTINUED)
0
0
0
Rev. 1 | Page 18 of 24 | www.onsemi.com
1
1
1
R/W
R/W
R/W
ADT7483A
ADT7483A
ACK. BY
ACK. BY
ADT7483A
ACK. BY
9
9
D7
9
1
D7
D7
1
1
the address of the internal data register to be written to, which
is stored in the address pointer register. The second data byte is
the data to be written to the internal data register.
D7
D6
1
D6
D6
A read operation is then performed consisting of the serial
bus address, R/W bit set to 1, followed by the data byte
read from the data register (see Figure 18).
If the address pointer register is known to be already at the
desired address, data can be read from the corresponding
data register without first writing to the address pointer
register and the bus transaction shown in Figure 17 can
be omitted.
D6
D5
D5
D5
ADDRESS POINTER REGISTER BYTE
D5
D4
DATA BYTE FROM ADT7483A
ADDRESS POINTER REGISTER BYTE
D4
D4
FRAME 3
DATA
BYTE
D4
D3
FRAME 2
FRAME 2
D3
D3
FRAME 2
D3
D2
D2
D2
D2
D1
D1
D1
D1
D0
D0
D0
ADT7483A
ACK. BY
D0
ADT7483A
MASTER
ACK. BY
ACK. BY
9
9
9
ADT7483A
ACK. BY
9
STOP BY
MASTER
STOP BY
MASTER
STOP BY
MASTER

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