EVALVIPER17H-6W STMicroelectronics, EVALVIPER17H-6W Datasheet - Page 22

BOARD EVAL FOR VIPER17H

EVALVIPER17H-6W

Manufacturer Part Number
EVALVIPER17H-6W
Description
BOARD EVAL FOR VIPER17H
Manufacturer
STMicroelectronics
Series
VIPER™r
Datasheets

Specifications of EVALVIPER17H-6W

Main Purpose
AC/DC, Primary Side
Outputs And Type
1, Isolated
Power - Output
6W
Voltage - Output
12V
Voltage - Input
85 ~ 265VAC
Regulator Topology
Flyback
Frequency - Switching
115kHz
Board Type
Fully Populated
Utilized Ic / Part
VIPer17
Product
Power Management Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-6446
Operation descriptions
22/31
Equation 7
Equation 8
The R
The C
The
considered instead of C
satisfy, in all case, the loop stability and the enough OLP delay time alike.
Figure 28. FB pin configuration
Figure 29. FB pin configuration
Equation 5
FB(DYN)
FB1
capacitor fixes the OLP delay and usually C
is the dynamic resistance seen by the FB pin.
can be still used to calculate the OLP delay time but C
Rfb1
Cfb1
FB
. Using the alternative compensation network, the designer can
Cfb
f
f
PFB
PFB
Cfb
Doc ID 14419 Rev 7
1
=
=
2
2
⋅ π
⋅ π
CONTROL
R
C
C
PWM
FB
FB
FB
CONTROL
PWM
BURST-MODE
1
(
DYN
References
(
(
R
R
1
FB
)
FB
References
+
V FBolp
1
(
DYN
R
+
V FBolp
FB
R
FB1
)
FB
OLP comparator
1
R
(
DYN
results much higher than C
BURST-MODE
PWM
OLP comparator
FB
From sense FET
+
+
-
-
LOGIC
1
)
BURST-MODE
)
)
PWM
From R
+
+
-
-
LOGIC
SENSE
To disable logic
To PWM Logic
To disable logic
FB1
BURST
To GATE driver
BURST
has to be
VIPER17
FB
.

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