HSC-ADC-EVALB-DC Analog Devices Inc, HSC-ADC-EVALB-DC Datasheet - Page 2
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HSC-ADC-EVALB-DC
Manufacturer Part Number
HSC-ADC-EVALB-DC
Description
KIT EVAL ADC FIFO DUAL-CH USB HS
Manufacturer
Analog Devices Inc
Datasheet
1.HSC-ADC-EVALB-DC.pdf
(28 pages)
Specifications of HSC-ADC-EVALB-DC
Lead Free Status / Rohs Status
Not Compliant
HSC-ADC-EVALB-SC/HSC-ADC-EVALB-DC
TABLE OF CONTENTS
Features .............................................................................................. 1
Equipment Needed........................................................................... 1
Product Description......................................................................... 1
Functional Block Diagram .............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
FIFO Evaluation Board Easy Start.................................................. 3
Virtual Evaluation Board Easy Start With ADIsimADC ............ 4
FIFO 4.1 Data Capture Board Features ......................................... 5
Theory of Operation ........................................................................ 9
REVISION HISTORY
2/06—Revision 0: Initial Version
Requirements ................................................................................ 3
Easy Start Steps ............................................................................. 3
Requirements ................................................................................ 4
Easy Start Steps ............................................................................. 4
FIFO 4.1 Supported ADC Evaluation Boards .......................... 6
Clocking Description................................................................... 9
SPI Description............................................................................. 9
Rev. 0 | Page 2 of 28
Jumpers ............................................................................................ 11
Evaluation Board ............................................................................ 13
FIFO Schematics and PCB Layout ............................................... 14
Bill of Materials............................................................................... 23
Ordering Information.................................................................... 25
Clocking with Interleaved Data................................................ 10
Connecting to the HSC-ADC-FPGA-4/-8 ............................. 10
Connecting to the DEMUX BRD ............................................ 10
Upgrading FIFO Memory......................................................... 10
Default Settings........................................................................... 11
Power Supplies ............................................................................ 13
Connection and Setup ............................................................... 13
Schematics................................................................................... 14
PCB Layout ................................................................................. 21
Ordering Guide .......................................................................... 25
ESD Caution................................................................................ 25