AD9858/FDPCB Analog Devices Inc, AD9858/FDPCB Datasheet

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AD9858/FDPCB

Manufacturer Part Number
AD9858/FDPCB
Description
BOARD EVAL FOR AD9858/FD
Manufacturer
Analog Devices Inc
Datasheets

Specifications of AD9858/FDPCB

Rohs Status
RoHS non-compliant
Design Resources
Low Jitter Sampling Clock Generator for High Performance ADCs Using AD9958/9858 and AD9515 (CN0109)
Lead Free Status / Rohs Status
Not Compliant
INTRODUCTION
The AD9858 is a 1 GHz direct digital synthesizer (DDS)
featuring a 10-bit DAC, an RF mixer, and on-chip PLL synthesis
blocks. Used in conjunction, the various components of the
AD9858 allow the user to construct translation loops (also
known as offset loops), fractional divider loops, traditional
integer-N PLL loops, as well as frequency synthesis directly
from the DDS. Because different systems require different
connections and different external components, each evaluation
board was designed with a specific application in mind. This
document addresses the evaluation board for using the DDS as
the fractional divide element in a PLL loop, offering greater
frequency resolution for a given reference frequency. Included
is information on system requirements, installing the evaluation
software, menus and buttons, and window environments.
Documentation for the DAC output and translation loop boards
is also accessible from the Design Tools section of the Analog
Devices DDS website: www.analog.com/dds.
REFERENCE
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
MHz
150
150MHz
FILTER
Figure 1. AD9858 Fractional Divider Evaluation Board
AD9858
DAC
FREQUENCY
FREQUENCY
DETECTOR
1000MSPS
150MHz
TUNING
PHASE
WORD
DDS
32
1000
MHz
CHARGE PUMP
DIVIDER
1/2
UP TO 2GHz MAX
FILTER
LOOP
VCO
Fractional Divider Evaluation Board
CIRCUIT OVERVIEW
In this circuit, an arbitrary external reference of 150 MHz is
assumed (although any value up to 150 MHz could be used).
The on-chip phase frequency detector compares this reference
to the filtered output of the DDS and generates an error signal.
This error signal drives the charge pump. The charge pump
current passes through an external loop filter to an external
VCO. The VCO generates the loop output signal, which is
fed back to the loop as the clock signal for the DDS. The
divide-by-2 block (on by default) must be left enabled for all
DDS clock signals between 1 GHz and 2 GHz, because the
maximum operating speed of the DDS is 1 GSPS. Output
frequencies can be manipulated by either adjusting the
reference signal or by digitally changing the frequency tuning
word of the DDS. In a DDS, the DDS output frequency is
related to its clock by the following equation:
In this circuit, the SYSCLK is ½ of the output of the VCO. FTW
is the frequency tuning word that can take on a range of values,
0 ≤ FTW ≤ 2
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
31
.
© 2004 Analog Devices, Inc. All rights reserved.
F
o
=
FTW
2
32
AD9858FDPCB
×
SYSCLK
www.analog.com

Related parts for AD9858/FDPCB

AD9858/FDPCB Summary of contents

Page 1

INTRODUCTION The AD9858 GHz direct digital synthesizer (DDS) featuring a 10-bit DAC mixer, and on-chip PLL synthesis blocks. Used in conjunction, the various components of the AD9858 allow the user to construct translation loops (also ...

Page 2

AD9858FDPCB TABLE OF CONTENTS Equipment ..................................................................................... 3 Installing from the CD................................................................. 3 Installing from the Web ............................................................... 3 Main Program Window............................................................... 3 Buttons........................................................................................... 4 Menus............................................................................................. 4 Control Window........................................................................... 5 I/O Interface.................................................................................. 6 PLL Fast Lock................................................................................ 7 REVISION HISTORY Revision 0: ...

Page 3

EQUIPMENT In order to install and use this software and evaluation board, the user needs the following: 2 Power supplies 1 PC (Windows®95 or higher), with one free parallel printer port 1 Precision signal generator (to act as a stable ...

Page 4

AD9858FDPCB BUTTONS The main program window has these buttons: • The Load Setup and Save Setup buttons load a setup file and save the current setup to a setup file. • The Reset button issues a master reset to the ...

Page 5

CONTROL WINDOW The control window allows the user to set many of the operating parameters of the device. In the Clock pane, the user can specify the current clock frequency supplied to the device. If the user desires, the clock ...

Page 6

AD9858FDPCB I/O INTERFACE This window is where the user specifies whether the evaluation board is to communicate with the AD9858 device in parallel or serial mode. In serial mode, the user can also specify LSB first or last as well ...

Page 7

PLL FAST LOCK This window is accessible from the Control window or from the View menu. The PLL Fast Lock window allows the user to enable and disable the PLL Fast Lock algorithm. When engaged, the charge pump operates in ...

Page 8

AD9858FDPCB PROFILES WINDOW The AD9858 has four user-defined profiles (segments of memory). Each profile can be programmed with a different frequency tuning word and phase adjustment word. As shown in Figure 13, users can click the Edit button next to ...

Page 9

FREQUENCY SWEEP SETUP DIALOG BOXES At the bottom of the Profiles window is the display for the frequency sweeping mode variables—Delta Frequency Tuning Word and Ramp Rate. Clicking the Edit button opens a dialog window that assists the user in ...

Page 10

AD9858FDPCB READBACK WINDOW When the READBACK button is clicked, the evaluation software polls and displays the current contents of all internal memory registers. When the CLEAR button is clicked, a master reset is issued and all internal memory registers are ...

Page 11

USING THE EVALUATION SOFTWARE WITH THE FRACTIONAL DIVIDER BOARD As mentioned in the Circuit Overview section, the AD9858 cannot operate at speeds greater than 1 GHz. It can accept clocks from 1 GHz to 2 GHz, but ...

Page 12

... AD9858FDPCB ORDERING GUIDE Model Package Description AD9858/FDPCB Fractional-Divide Loop Frequency Synthesizer Board © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04429-0-1/04(0) Rev Page ...

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