AD8323-EVAL Analog Devices Inc, AD8323-EVAL Datasheet - Page 9

• Manufacturer Part Number: AD8323-EVAL
• Description: BOARD EVAL FOR AD8323
• Manufacturer: Analog Devices Inc
• Type: Video Processorr

Specifications of AD8323-EVAL

• Rohs Status: RoHS non-compliant
• Contents: Evaluation Board
• For Use With/related Products: AD8322

Distortion, Adjacent Channel Power, and DOCSIS
In order to deliver 58 dBmV of high fidelity output power
required by DOCSIS, the PA should be able to deliver about
60 dBmV to 61 dBmV in order to make up for losses associated
with the transformer and diplexer. It should be noted that the
AD8323 was characterized with the TOKO 617DB-A0070
transformer. TPC 7 and TPC 8 show the AD8323 second and
third harmonic distortion performance versus fundamental
frequency for various output power levels. These figures are
useful for determining the inband harmonic levels from 5 MHz to
65 MHz. Harmonics higher in frequency will be sharply attenu-
ated by the low-pass filter function of the diplexer. Another
measure of signal integrity is adjacent channel power or ACP.
DOCSIS section 4.2.9.1.1 states, “Spurious emissions from a
transmitted carrier may occur in an adjacent channel that could
be occupied by a carrier of the same or different symbol rates.”
Figure 7 shows the measured ACP for a 16 QAM, 60 dBmV
signal, taken at the output of the AD8323 evaluation board (see
Figure 13 for evaluation board schematic). The transmit chan-
nel width and adjacent channel width in Figure 7 correspond to
symbol rates of 160 K
the AD8323 for all conditions in DOCSIS Table 4-7 “Adjacent
Channel Spurious Emissions.”
Noise and DOCSIS
At minimum gain, the AD8323’s output noise spectral density is
10 nV/√Hz measured at 10 MHz. DOCSIS Table 4-8, “Spurious
Emissions in 5 MHz to 42 MHz,” specifies the output noise for
various symbol rates. The calculated noise power in dBmV for
160 K
SYMBOL RATE
160 K
320 K
640 K
1280 K
2560 K
TRANSMIT
CHANNEL
Table I. ACP Performance for All DOCSIS Conditions





SYM/SEC
SYM/SEC
SYM/SEC
SYM/SECOND
SYM/SEC
SYM/SEC
20
–10
–20
–30
–40
–50
–60
–70
–80
CENTER 10 MHz
log
RBW 500 Hz RF ATT 40dB
VBW 5 kHz
SWT 12s UNIT dBm
CL1
160 K








–53.0
–52.7
–53.8
–53.7
–55.4
SYM/SEC
10
is:
Hz
nV
SYM/SEC
CL1
(All Values in dBc)
320 K

 ×

2
ADJACENT CHANNEL SYMBOL RATE
C0
–53.8
–53.4
–52.9
–53.4
–54.0
SYM/SEC
160
. Table I shows the ACP results for
60 kHz
kHz
640 K
–55.0
–53.8
–53.3
–53.0
–53.6
SYM/SEC





C0





CH PWR
ACP UP
ACP LOW
+
60
CU1
1280 K
SPAN 600 kHz
=
–56.6
–54.8
–53.6
–53.3
–53.1
–
SYM/SEC
5.44 dBm
–52.99 dB
–54.36 dB
48
dBmV
CU1
F1
2560 K
–56.3
–55.4
–54.2
–53.5
–53.3
SYM/SEC
Comparing the computed noise power of –48 dBmV to the
8 dBmV signal yields –56 dBc, which meets the required level of
–53 dBc set forth in DOCSIS Table 4-8. As the AD8323’s gain is
increased from this minimum value, the output signal increases at a
faster rate than the noise, resulting in a signal to noise ratio that
improves with gain. In transmit disable mode, the output noise
spectral density computed over 160 K
or –68 dBmV.
Evaluation Board Features and Operation
The AD8323 evaluation board (Part # AD8323-EVAL) and
control software can be used to control the AD8323 upstream
cable driver via the parallel port of a PC. A standard printer
cable connected between the parallel port and the evaluation
board is used to feed all the necessary data to the AD8323 by
means of the Windows-based, Microsoft Visual Basic control
software. This package provides a means of evaluating the
amplifier by providing a convenient way to program the gain/
attenuation as well as offering easy control of the amplifiers’
asynchronous PD and SLEEP pins. With this evaluation kit the
AD8323 can be evaluated with either a single-ended or differential
input configuration. The amplifier can also be evaluated with or
without the PULSE diplexer in the output signal path. To remove
the diplexer from the signal path, move the 0 Ω chip resistor at
JP5 so the output signal is directed away from the diplexer
and toward the CABLE port of the evaluation board. Also,
remove the 0 Ω resistor at JP4. A schematic of the evaluation
board is provided in Figure 13.
Overshoot on PC Printer Ports
The data lines on some PC parallel printer ports have excessive
overshoot that may cause communications problems when pre-
sented to the CLK pin of the AD8323 (TP5 on the evaluation
board). The evaluation board was designed to accommodate a
series resistor and shunt capacitor (R1 and C15) to filter the
CLK signal if required.
Transformer and Diplexer
A 1:1 transformer is needed to couple the differential outputs of
the AD8323 to the cable while maintaining a proper impedance
match. The specified transformer is available from TOKO (Part
# 617DB-A0070); however, MA/COM part # ETC-1-1T-15
can also be used. The evaluation board is equipped with the
TOKO transformer, but is also designed to accept the MA/
COM transformer. The PULSE diplexer included on the
evaluation board provides a high-order low-pass filter function,
typically used in the upstream path. The ability of the PULSE
diplexer to achieve DOCSIS compliance is neither expressed
nor implied by Analog Devices Inc. Data on the diplexer should
be obtained from PULSE.
Differential Inputs
The AD8323-EVAL evaluation board is designed to accommodate
a Mini-Circuits T1-6T-KK81 1:1 transformer for the purpose of
converting a single-ended (ground-referenced) input signal to
differential inputs. Figure 8 and the following paragraphs identify
two options for providing differential input signals to the AD8323
evaluation board.
SYM/SECOND
AD8323
is 1.0 nV/√Hz