AD8310-EVAL Analog Devices Inc, AD8310-EVAL Datasheet
AD8310-EVAL
Specifications of AD8310-EVAL
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AD8310-EVAL Summary of contents
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... MHz over the central portion of the range, but it is somewhat greater at 440 MHz. There is no minimum frequency limit; the AD8310 can be used down to low audio frequencies. Special filtering features are provided to support this wide range. The output voltage runs from a noise-limited lower boundary of 400 upper limit within 200 mV of the supply voltage for light loads ...
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... Change to Basic Connections Section ......................................... 14 Changes to Equation 10 ................................................................. 17 Changes to Ordering Guide .......................................................... 22 10/04—Rev Rev. D Format Updated .................................................................. Universal Typical Performance Characteristics Reordered .......................... 6 Changes to Figure 41 and Figure 42 ............................................. 20 Using the AD8310 .......................................................................... 14 Basic Connections ...................................................................... 14 Transfer Function in Terms of Slope and Intercept ............... 15 dBV vs. dBm ............................................................................... 15 ...
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... C ≤ ≥ 402 Ω, C ≤ ≥ 402 Ω, C ≤ ≥ 402 Ω, C ≤ < +85°C A < +85°C A < +85°C A Rev Page AD8310 Min Typ Max Unit ±2.0 ±2 dBV 17 dBm 20 dBm 1.28 nV/√Hz −78 dBm 800 1000 1200 Ω 1 ...
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... AD8310 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage Input Power (re 50 Ω), Single-Ended Differential Drive Internal Power Dissipation θ JA Maximum Junction Temperature Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering 60 sec) Stresses above those listed under Absolute Maximum Ratings Rating may cause permanent damage to the device ...
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... Buffer Input. Used to lower postdetection bandwidth. 7 ENBL CMOS Compatible Chip Enable. Active when high. 8 INHI Second of Two Balanced Inputs. Biased roughly to VPOS/2. INLO INHI 1 8 AD8310 COMM ENBL 2 7 TOP VIEW OFLT BFIN 3 6 (Not to Scale) VOUT VPOS 4 5 Figure 2. Pin Configuration Rev Page AD8310 ...
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... AD8310 TYPICAL PERFORMANCE CHARACTERISTICS 3.0 2.5 2.0 1 –40° +25° +85° –120 –100 –80 –60 –40 (–87dBm) INPUT LEVEL (dBV) Figure 3. RSSI Output vs. Input Level, 100 MHz Sine Input −40°C, +25°C, and +85°C, Single-Ended Input A 3.0 2.5 2.0 1 ...
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... Figure 13. Large-Signal RSSI Pulse Response with R and pF, 68 pF, and 100 OUT 100ns PER 200mV PER HORIZONTAL VERTICAL DIVISION DIVISION GND REFERENCE INPUT 20mV PER VERTICAL DIVISION Figure 14. Small-Signal RSSI Pulse Response with R and Back Termination of 50 Ω (Total Load = 100 Ω) AD8310 = 100 Ω Ω L ...
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... AD8310 100 +85°C A 0.1 0. +25°C A 0.001 0.0001 T = –40°C A 0.00001 0.5 0.7 0.9 1.1 1.3 1.5 1.7 ENABLE VOLTAGE (V) Figure 15. Supply Current vs. Enable Voltage −40°C, +25°C, and +85° FREQUENCY (MHz) Figure 16. RSSI Slope vs. Frequency 40 NORMAL (23.6584, 35 0.308728 21.5 22.0 22 ...
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... V is the intercept voltage. X Log amps implicitly require two references (here V that determine the scaling of the circuit. The accuracy of a log amp cannot be any better than the accuracy of its scaling references. In the AD8310, these are provided by a band gap reference. V OUT 5V Y ...
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... INHI and INLO the use of a narrow-band matching network. Note that log amps do not inherently respond to power, but to the voltage applied to their input. The AD8310 presents a nominal input impedance much higher than 50 Ω (typically 1 kΩ at low frequencies). A simple input matching network can considerably improve the power sensitivity of this type of log amp ...
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... They are a maximum of 100 μA when ENBL is taken under worst- case conditions. For voltages below 1 V, the AD8310 is disabled and consumes a sleep current of less than 1 μA. When tied to the supply or a voltage above fully enabled. The internal bias circuitry is very fast (typically < ...
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... COMM Figure 24. Signal Input Interface Occasionally, it might be desirable to use the dc-coupled potential of the AD8310 in baseband applications. The main challenge here is to present the signal at the elevated common- mode input level, which might require the use of low noise, low offset buffer amplifiers. In some cases, it might be possible to use dual supplies of ± ...
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... This is then amplified by a factor the output buffer, which can drive a current grounded load resistor. The overall rise time of the AD8310 is less than 15 ns. There is also a delay time of about 6 ns when the log amp is driven burst, starting at zero amplitude. ...
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... The 52.3 Ω resistor combines with the 1.1 kΩ input impedance of the AD8310 to yield a simple broadband 50 Ω input match. An input matching network can also be used (see the Input Matching section). ...
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... The intercept is the point at which the extrapolated linear response would intersect the horizontal axis (see Figure 29). For the AD8310, the intercept is calibrated to be −108 dBV (−95 dBm). Using the slope and intercept, the output voltage can be calculated for any input level within the specified input ...
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... L 47 6.8 where C Step 2: Calculate C Now, having a purely resistive input impedance, calculate the nominal coupling elements, C For the AD8310, R needed INHI 356 nH. Step 3: Split C To provide the desired fully balanced form of the network 1 shown in Figure 31, two capacitors C1 and C2, each of nominally twice C 14 ...
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... S input change. A common example of this is the need to map the output swing of the AD8310 into the input range of an analog- to-digital converter (ADC) with a rail-to-rail input swing. Alternatively, a situation might arise when only a part of the ...
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... For example, by using a 1 μF capacitor, the 3 dB corner is reduced to 60 Hz. C FILT − (11) The corner frequency is set by the following equation: idth where C Rev Page AD8310 OFLT C OFLT (SEE TEXT) Figure 36. Lowering the High-Pass Corner Frequency of the Offset Control Loop CORNER π ...
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... AD8307 applications (note the slightly different pin configuration). CABLE-DRIVING For a supply voltage greater, the AD8310 can drive a grounded 100 Ω load to 2 reverse-termination is required when driving a 50 Ω cable, it should be included in series with the output, as shown in Figure 37. The slope at the load is then 12 mV/dB ...
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... EVALUATION BOARD An evaluation board is available that has been carefully laid out and tested to demonstrate the specified high speed performance of the AD8310. Figure 40 shows the schematic of the evaluation board, which follows the basic connections schematic shown in Figure 27. Connectors INHI, INLO, and VOUT are of the SMA type. ...
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... See Figure 28. C1, C2, R3 Input Interface. R3 (52.3 Ω) combines with the AD8310’s 1 kΩ input impedance to give an overall broadband input impedance of 50 Ω. C1, C2, and the AD8310’s input impedance combine to set a high-pass input corner of 32 kHz ...
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... AD8310 DIE INFORMATION Table 7. Die Pad Function Descriptions Pin No. Mnemonic Description 1 INLO One of Two Balanced Inputs. Biased roughly to VPOS/2. 2 COMM Common Pin. Usually grounded. 3 OFLT Offset Filter Access. Nominally at about 1. VOUT Low Impedance Output Voltage. Carries maximum load. 5A, 5B VPOS Positive Supply quiescent current. ...
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... ORDERING GUIDE 1 Model Temperature Range AD8310ARM −40°C to +85°C AD8310ARM-REEL7 −40°C to +85°C AD8310ARMZ −40°C to +85°C AD8310ARMZ-REEL7 −40°C to +85°C AD8310ACHIPS −40°C to +85°C AD8310-EVAL RoHS Compliant Part. 3.20 3.00 2.80 5. 3.20 4.90 3.00 4. ...
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... AD8310 NOTES © 2005–2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D01084–0–6/10(F) Rev Page ...