PIC12F675/ICD Microchip Technology, PIC12F675/ICD Datasheet - Page 57

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PIC12F675/ICD

Manufacturer Part Number
PIC12F675/ICD
Description
IC MCU 1K FLASH DEVLP TOOL 14DIP
Manufacturer
Microchip Technology

Specifications of PIC12F675/ICD

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9.3
The PIC12F629/675 differentiates between various
kinds of Reset:
a)
b)
c)
d)
e)
f)
Some registers are not affected in any Reset condition;
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
• Power-on Reset
• MCLR Reset
• WDT Reset
• WDT Reset during Sleep
• Brown-out Detect (BOD) Reset
FIGURE 9-4:
 2010 Microchip Technology Inc.
V
MCLR/
OSC1/
CLKIN
Note
PP
V
pin
Power-on Reset (POR)
WDT Reset during normal operation
WDT Reset during Sleep
MCLR Reset during normal operation
MCLR Reset during Sleep
Brown-out Detect (BOD)
DD
pin
Reset
1:
On-chip
RC OSC
OST/PWRT
This is a separate oscillator from the INTOSC/EC oscillator.
Brown-out
V
Module
Detect
DD
Detect
(1)
WDT
Rise
OST
PWRT
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
10-bit Ripple Counter
Time-out
Reset
10-bit Ripple Counter
WDT
BODEN
Power-on Reset
External
Reset
SLEEP
Enable PWRT
Enable OST
They are not affected by a WDT wake-up, since this is
viewed as the resumption of normal operation. TO and
PD bits are set or cleared differently in different Reset
situations as indicated in Table 9-4. These bits are
used in software to determine the nature of the Reset.
See Table 9-7 for a full description of Reset states of all
registers.
A simplified block diagram of the on-chip Reset Circuit
is shown in Figure 9-4.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Table 12-4 in Electrical
Specifications Section for pulse-width specification.
See Table 9-3 for time-out situations.
PIC12F629/675
S
R
DS41190G-page 57
Q
Q
Chip_Reset

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