PIC12F675/ICD Microchip Technology, PIC12F675/ICD Datasheet - Page 16

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PIC12F675/ICD

Manufacturer Part Number
PIC12F675/ICD
Description
IC MCU 1K FLASH DEVLP TOOL 14DIP
Manufacturer
Microchip Technology

Specifications of PIC12F675/ICD

Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
PIC12F629/675
2.2.2.4
The PIE1 register contains the interrupt enable bits, as
shown in Register 2-4.
REGISTER 2-4:
DS41190G-page 16
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-4
bit 3
bit 2-1
bit 0
R/W-0
EEIE
PIE1 Register
EEIE: EE Write Complete Interrupt Enable bit
1 = Enables the EE write complete interrupt
0 = Disables the EE write complete interrupt
ADIE: A/D Converter Interrupt Enable bit (PIC12F675 only)
1 = Enables the A/D converter interrupt
0 = Disables the A/D converter interrupt
Unimplemented: Read as ‘0’
CMIE: Comparator Interrupt Enable bit
1 = Enables the comparator interrupt
0 = Disables the comparator interrupt
Unimplemented: Read as ‘0’
TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enables the TMR1 overflow interrupt
0 = Disables the TMR1 overflow interrupt
R/W-0
ADIE
PIE1: PERIPHERAL INTERRUPT ENABLE REGISTER 1 (ADDRESS: 8Ch)
W = Writable bit
‘1’ = Bit is set
U-0
U-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
CMIE
Note:
Bit PEIE (INTCON<6>) must be set to
enable any peripheral interrupt.
U-0
 2010 Microchip Technology Inc.
x = Bit is unknown
U-0
TMR1IE
R/W-0
bit 0

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