M30850T3-CPE Renesas Electronics America, M30850T3-CPE Datasheet - Page 83

• Manufacturer Part Number: M30850T3-CPE
• Description: EMULATOR FOR M32C/80,84,85,86,8A
• Manufacturer: Renesas Electronics America
• Type: In Circuit Debuggerr

Specifications of M30850T3-CPE

• Contents: Compact Emulator, IDE, Assembler and Linker
• For Use With/related Products: M32C/80, M32C/84, M32C/85, M32C/86, M32C/8A
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

M30850T3-CPE User’s Manual
REJ10J1430-0300 Rev.3.00 Aug. 17, 2009
Notes on Reset Vector Area:
Notes on Stack Area:
Note on Maskable Interrupts:
Notes on Access Prohibited Area:
Note on DMA Transfer:
Note on DMAC II Transfer Completion Interrupts:
Note on Final Evaluation:
For a reset vector area, memory of the emulator is always selected regardless of the setting of the emulation
memory tab.
A reset vector area can be changed only when a program is stopped.
With this product, a maximum 8 bytes of the user stack is consumed as a work area. Therefore, ensure the +8
byte maximum capacity used by the user program as the use stack area.
Even if the user stack does not have an enough area, do not use areas which cannot be used as a stack (SFR
area, RAM area which stores data, or ROM area) as a work area. Using areas like this is a cause of user
program crashes and destabilized emulator control.
With this product, the interrupt stack pointer (ISP) is set at 00500h and used as a stack area after a reset is
released.
Even if a user program is not being executed (including when run-time debugging is being performed), the
evaluation MCU keeps running so as to control the emulator, so the function such as timer is operated. Take
note that when the user program is not being executed (including when run-time debugging is being performed),
a peripheral I/O interruption is not accepted.
The emulator control register (000020h--00003Fh) in the SFR is read- and write-protected. When this register is
accessed, emulator control cannot be utilized.
With this product, address FFFFFFh cannot be read or written in correctly.
With this product, the user program is stopped with a loop program to a specific address. Therefore, if a DMA
request is generated by a timer or other source while the user program is stopped, DMA transfer is executed.
However, make note of the fact that DMA transfer while the program is stopped may not be performed
correctly. Also note that the below registers have been changed to generate DMA transfer as explained here
even when the user program is stopped.
You can use DMAC II transfer completion interrupts during program execution only. Do not generate DMAC II
transfer completion interrupts when you use any function but program execution.
Be sure to evaluate your system with an evaluation MCU. Before starting mask production, evaluate your
system and make final confirmation with a CS (Commercial Sample) version MCU.
(1) DMA0 transfer count register DCT0
(2) DMA1 transfer count register DCT1
(3) DMA0 memory address register DMA0
(4) DMA1 memory address register DMA1
(5) DMA2 transfer count register DCT2 (R0)
(6) DMA3 transfer count register DCT3 (R1)
(7) DMA2 memory address register DMA2 (A0)
(8) DMA3 memory address register DMA3 (A1)
IMPORTANT
4. Hardware Specifications
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