MPC8572DS Freescale Semiconductor, MPC8572DS Datasheet - Page 9

KIT MPU POWERQUICC III

MPC8572DS

Manufacturer Part Number
MPC8572DS
Description
KIT MPU POWERQUICC III
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8572DS

Contents
Board
Data Rate
10 Mbps to 100 Mbps
Memory Type
Flash, DDR, DDR2, DDR3, SDRAM
Interface Type
I2C, Ethernet
Operating Voltage
3.3 V
Data Bus Width
32 bit
Product
Development Tools
Silicon Manufacturer
Freescale
Core Architecture
Power Architecture
Core Sub-architecture
PowerQUICC
Silicon Core Number
MPC85xx
Silicon Family Name
PowerQUICC III
Rohs Compliant
Yes
For Use With/related Products
MPC8572E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Freescale Semiconductor
— 256-byte maximum payload size
— Virtual channel 0 only
— Full 64-bit decode with 36-bit wide windows
Pin multiplexing for the high-speed I/O interfaces supports one of the following configurations:
— Single x8/x4/x2/x1 PCI Express
— Dual x4/x2/x1 PCI Express
— Single x4/x2/x1 PCI Express and dual x2/x1 PCI Express
— Single 1x/4x Serial RapidIO and single x4/x2/x1 PCI Express
Power management
— Supports power saving modes: doze, nap, and sleep
— Employs dynamic power management, that automatically minimizes power consumption of
System performance monitor
— Supports eight 32-bit counters that count the occurrence of selected events
— Ability to count up to 512 counter-specific events
— Supports 64 reference events that can be counted on any of the eight counters
— Supports duration and quantity threshold counting
— Permits counting of burst events with a programmable time between bursts
— Triggering and chaining capability
— Ability to generate an interrupt on overflow
System access port
— Uses JTAG interface and a TAP controller to access entire system memory map
— Supports 32-bit accesses to configuration registers
— Supports cache-line burst accesses to main memory
— Supports large block (4-Kbyte) uploads and downloads
— Supports continuous bit streaming of entire block for fast upload and download
IEEE Std 1149.1™ compatible, JTAG boundary scan
1023 FC-PBGA package
blocks when they are idle
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Overview
9

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