MPC8572DS Freescale Semiconductor, MPC8572DS Datasheet - Page 137

KIT MPU POWERQUICC III

MPC8572DS

Manufacturer Part Number
MPC8572DS
Description
KIT MPU POWERQUICC III
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8572DS

Contents
Board
Data Rate
10 Mbps to 100 Mbps
Memory Type
Flash, DDR, DDR2, DDR3, SDRAM
Interface Type
I2C, Ethernet
Operating Voltage
3.3 V
Data Bus Width
32 bit
Product
Development Tools
Silicon Manufacturer
Freescale
Core Architecture
Power Architecture
Core Sub-architecture
PowerQUICC
Silicon Core Number
MPC85xx
Silicon Family Name
PowerQUICC III
Rohs Compliant
Yes
For Use With/related Products
MPC8572E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
23 Document Revision History
Table 90
Freescale Semiconductor
Number
Rev.
5
4
3
2
1
0
provides a revision history for the MPC8572E hardware specification.
01/2011
06/2010
03/2010
06/2009
08/2008
07/2008
Date
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
• Editorial changes throughout
• Updated
• In
• Added
• In
• Updated
• In
• In
• In
• In
• In
• Clarified restrictions in
• In
• Added
• In
• In
• In
• In
• Added LPBSE to description of LGPL4/LGTA/LUPWAIT/LPBSE/LFRB signal in
• Corrected supply voltage for GPIO pins in
• Applied note to SD1_PLL_TPA in
• Updated note regarding MDIC in
• Added note for LAD pins in
• Updated
• In
• Initial release.
changed table headings to say “Package Sphere Type”.
silicon.
silicon.
Table
announced in Product Bulletin #13572.
to 63% Sn, 37% Pb.
correct the package thickness and top view.
Table
changed minimum CCB clock frequency for proper PCI Express operation.
“MPC8572E Pinout Listing.”
number information. Added note indicating that silicon version 2.0 is available for prototype
purposes only and will not be available as a qualified device.
Table 88
Section 22.1, “Part Numbers Fully Addressed by this
Section 22.1, “Part Numbers Fully Addressed by this Document,”
Section 18.1, “Package Parameters for the MPC8572E FC-PBGA,”
Section 18.3, “Pinout Listings,”
Section 2.1, “Overall DC Electrical
Section 22.1, “Part Numbers Fully Addressed by this Document,”
Section 3, “Power Characteristics,”
Section 4.4, “DDR Clock Timing,”
Table
Section 18.2, “Mechanical Dimensions of the MPC8572E
Section 19.1, “Clock Ranges,”
Section 19.5.2, “Minimum Platform Frequency Requirements for High-Speed Interfaces,”
Section 22.1, “Part Numbers Fully Addressed by this Document,”
5, “MPC8572EL Power Dissipation.”
77, “MPC8572E Processor Core Clocking Specifications.”
Table
Section 14, “GPIO.”
9, “RESET Initialization Timing Specifications,” added note 2.
“Part Numbering Nomenclature—Rev 1.1.1,” for devices without Security Engine feature.
Table
Section 14.1, “GPIO DC Electrical Characteristics.”
Table
Table 90. Document Revision History
86, “Part Numbering Nomenclature—Rev 2.2.1.”
4, “MPC8572E Power Dissipation,” to include low power product.
88, “,Part Numbering Nomenclature—Rev 1.1.1” with Rev 2.0 and Rev 2.1 part
Section 4.5, “Platform to eTSEC FIFO Restrictions.”
Table
updated CCB Max to 533MHz for 1200MHz core device in
Table
76, “MPC8572E Pinout Listing.”
updated
Table
Substantive Change(s)
changed DDRCLK Max to 100MHz. This change was
Characteristics,” changed GPIO power from OVDD to BVDD.
updated CCB Max to 533MHz for 1200MHz core device in
76, “MPC8572E Pinout Listing.”
76, “MPC8572E Pinout Listing.”
Table
Table 76
76, “MPC8572E Pinout Listing.”
showing GPINOUT power rail as BVDD.
Document,” defined PPC as “Prototype” and
FC-PBGA, updated
updated
added
added SVR information in,
updated material composition
Document Revision History
Table 87
Table 88
Table
Figure 61
for Rev 2.1
for Rev 1.1.1
76,
to
137

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