KIT908E624DWBEVB Freescale Semiconductor, KIT908E624DWBEVB Datasheet - Page 19

• Manufacturer Part Number: KIT908E624DWBEVB
• Description: KIT EVAL 908E624 TRPL W/MCU/LIN
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of KIT908E624DWBEVB

• Contents: *
• Silicon Manufacturer: Freescale
• Core Architecture: HC08
• Core Sub-architecture: HC08
• Silicon Core Number: MC68HC908
• Silicon Family Name: HC08E
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MCU POWER SUPPLY TERMINALS
(EVDD AND EVSS)
terminals, respectively. The MCU operates from a single-
power supply.
duration current demands on the power supply. To prevent
noise problems, take special care to provide power supply
bypassing at the MCU.
ADC SUPPLY TERMINALS (VDDA AND VSSA)
analog-to-digital converter (ADC). It is recommended that a
high-quality ceramic decoupling capacitor be placed between
these terminals.
tied to the same potential as EVDD via separate traces.
VSSA is the ground terminal for the ADC and should be tied
to the same potential as EVSS via separate traces.
ADC REFERENCE TERMINALS
(VREFL AND VREFH)
the ADC. It is recommended that a high-quality ceramic
decoupling capacitor be placed between these terminals.
ADC and should be tied to the same potential as VDDA via
separate traces. VREFL is the low reference supply for the
ADC and should be tied to the same potential as VSSA via
separate traces.
TEST TERMINAL (FLSVPP)
the application or connect to GND.
PWMIN TERMINAL (PWMIN)
outputs 1 and 2 (HS1 and HS2). If no PWM control is
required, PWMIN must be connected to VDD to enable the
HS1 and HS2 outputs.
LIN TRANSCEIVER OUTPUT TERMINAL (RXD)
must be connected to the microcontroller’s Enhanced Serial
Communications Interface (ESCI) module (RXD terminal).
RESET TERMINAL (
must be connected to the
external pullup resistor.
Analog Integrated Circuit Device Data
Freescale Semiconductor
EVDD and EVSS are the power supply and ground
Fast signal transitions on MCU terminals place high, short-
For details, refer to the 68HC908EY16 data sheet.
VDDA and VSSA are the power supply terminals for the
Important VDDA is the supply for the ADC and should be
For details, refer to the 68HC908EY16 data sheet.
VREFL and VREFH are the reference voltage terminals for
Important VREFH is the high reference supply for the
For details, refer to the 68HC908EY16 data sheet.
This terminal is for test purposes only. Do not connect in
This terminal is the direct PWM input for high side
This terminal is the output of LIN transceiver. The terminal
RST_A
Important To ensure proper operation, do not add any
is the reset output terminal of the analog die and
RST_A
RST
terminal of the MCU.
)
INTERRUPT TERMINAL (
indicating errors or wake-up events. This terminal must be
connected to the
WINDOW WATCHDOG CONFIGURATION
TERMINAL (WDCONF)
watchdog. A resistor is connected to this terminal. The
resistor value defines the watchdog period. If the terminal is
open, the watchdog period is fixed to its default value.
programming or software debugging) by connecting this
terminal to GND.
POWER SUPPLY TERMINALS
(VSUP1 AND VSUP2)
regulator, the internal logic, and LIN transceiver.
for the high side switches.
POWER GROUND TERMINAL (GND)
HIGH SIDE OUTPUT TERMINALS (HS1 AND HS2)
such as relays or lamps. Each switch is protected with over-
temperature and current limit (over-current). The output has
an internal clamp circuitry for inductive load. The HS1 and
HS2 outputs are controlled by SPI and have a direct enabled
input (PWMIN) for PWM capability.
HIGH SIDE OUTPUT TERMINAL (HS3)
Hall-effect sensors, or switch pullup resistors. The switch is
protected with over-temperature and current limit (over-
current). The output is controlled only by SPI.
LIN BUS TERMINAL (LIN)
transmitter and receiver. It is suited for automotive bus
systems and is based on the LIN bus specification.
WAKE-UP TERMINALS (L1 AND L2)
sense external switches and to wake up the device from
Sleep or Stop mode. During Normal mode the state of these
terminals can be read through SPI.
to VSUP or GND to avoid parasitic transitions. In Low Power
Mode this could lead to random wakeup events.
IRQ_A
This terminal is the configuration terminal for the internal
The watchdog can be disabled (e.g., for flash
This VSUP1 power supply terminal supplies the voltage
This VSUP2 power supply terminal is the positive supply
This terminal is the device ground connection.
These terminals are high side switch outputs to drive loads
This high side switch can be used to drive small lamps,
The LIN terminal represents the single-wire bus
These terminals are high-voltage capable inputs used to
Important If unused these terminals should be connected
is the interrupt output terminal of the analog die
IRQ
terminal of the MCU.
FUNCTIONAL TERMINAL DESCRIPTION
IRQ_A
FUNCTIONAL DESCRIPTION
)
908E624
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