M52259EVB Freescale Semiconductor, M52259EVB Datasheet - Page 8

• Manufacturer Part Number: M52259EVB
• Description: BOARD EVAL FOR 52259 COLDFIRE V2
• Manufacturer: Freescale Semiconductor
• Series: ColdFire®r
• Type: MCUr

Specifications of M52259EVB

• Contents: Board, Cables, Documentation, DVD, Flash Drive and Power Supply
• Processor To Be Evaluated: MCF52259
• Data Bus Width: 32 bit
• Interface Type: RS-232, Ethernet, USB
• Silicon Manufacturer: Freescale
• Core Architecture: Coldfire
• Core Sub-architecture: Coldfire V2
• Silicon Core Number: MCF52
• Silicon Family Name: MCF5225x
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• For Use With/related Products: MCF52259
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
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— Pre-divider capable of dividing the clock source frequency into the PLL reference frequency range
— System can be clocked from PLL or directly from crystal oscillator or relaxation oscillator
— Low power modes supported
— 2
Interrupt controller
— Uniquely programmable vectors for all interrupt sources
— Fully programmable level and priority for all peripheral interrupt sources
— Seven external interrupt signals with fixed level and priority
— Unique vector number for each interrupt source
— Ability to mask any individual interrupt source or all interrupt sources (global mask-all)
— Support for hardware and software interrupt acknowledge (IACK) cycles
— Combinatorial path to provide wake-up from low-power modes
DMA controller
— Four fully programmable channels
— Dual-address transfer support with 8-, 16-, and 32-bit data capability, along with support for 16-byte (432-bit)
— Source/destination address pointers that can increment or remain constant
— 24-bit byte transfer counter per channel
— Auto-alignment transfers supported for efficient block movement
— Bursting and cycle-steal support
— Software-programmable DMA requests for the UARTs (3) and 32-bit timers (4)
— Channel linking support
Reset
— Separate reset in and reset out signals
— Seven sources of reset:
— Status flag indication of source of last reset
Chip configuration module (CCM)
— System configuration during reset
— Selects one of six clock modes
— Configures output pad drive strength
— Unique part identification number and part revision number
General purpose I/O interface
— Up to 56 bits of general purpose I/O on 100-pin package
— Up to 96 bits of general purpose I/O on 144-pin package
— Bit manipulation supported via set/clear functions
— Programmable drive strengths
— Unused peripheral pins may be used as extra GPIO
JTAG support for system level board testing
burst transfers
– Power-on reset (POR)
– External
– Software
– Watchdog
– Loss of clock / loss of lock
– Low-voltage detection (LVD)
– JTAG
n
(0  n  15) low-power divider for extremely low frequency operation
MCF52259 ColdFire Microcontroller, Rev. 4
Family Configurations
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