SKP36077 Renesas Electronics America, SKP36077 Datasheet - Page 34

KIT DEV EVAL FOR H8/36077

SKP36077

Manufacturer Part Number
SKP36077
Description
KIT DEV EVAL FOR H8/36077
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheets

Specifications of SKP36077

Contents
SKP Board, In-Circuit Debugger/Programmer, Target Cable, USB Cable and SKP CD-ROM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8/36077
Lead Free Status / RoHS Status
Supplier Unconfirmed, Lead free / RoHS Compliant
H8S/2400/2500 Series Line-up
H8S/2400 and H8S/2500 Series
• Up to 20MHz, 16 bit CISC CPU with
• 8 power-down modes for
• 32kHz sub-clock oscillator
• Support Smart Card interface
• Up to 26MHz, 16 bit CISC CPU
• 6 power-down modes for reducing
• 32kHz sub-clock oscillator
• Built-in Data Transfer Controller
• Up to 2-channel Controller Area Network
• Support Smart Card interface
• Dual 3V and 5V I/O functions supported
144 to 176 PINS
128 PINS
Hardware Multiply Accumulate Block
(H8S/2600 CPU)
reducing power consumption
conforming to ISO/IEC 7816-3
power consumption
(DTC) with maximum of 85 channels
(CAN v2.0) controller
conforming to ISO/IEC 7816-3
Features for H8S/2400 Series
Features for H8S/2500 Series
384-512KB ROM
24-32KB SRAM
2506 Group
2556 Group
3V to 5V
512KB ROM
32KB SRAM
384-512KB ROM
24-32KB SRAM
2552 Group
E10A supported (JTAG debug)
CAN supported
Plasma-TV, projectors, home electronics
H8S/2500 Series:
H8S/2400 Series:
Applications
20MHz
512KB
ROM:
RAM:
32KB
Flash
CPU:
DTC
H8S
10-bit x 16 ch
16-bit TPU
8-bit x 2 ch
LCD Monitor, LCD-TV,
Audio, automotive audio
ADC:
x 6 ch
DAC:
CAN
PLL
256KB ROM; 16KB SRAM
H8S/2556 Block Diagram
2437 Group
Watchdog
I
2
3V
C x 2 ch
Timer:
Timer
Clock
INTC
8-bit
4 ch
Sub
Controller
PC Break
External
x 5 ch
BSC
Bus
SCI
32

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