DEMO56F8014-EE Freescale Semiconductor, DEMO56F8014-EE Datasheet - Page 75

BOARD DEMO FOR 56F8014

DEMO56F8014-EE

Manufacturer Part Number
DEMO56F8014-EE
Description
BOARD DEMO FOR 56F8014
Manufacturer
Freescale Semiconductor
Type
MCUr

Specifications of DEMO56F8014-EE

Contents
*
Processor To Be Evaluated
MC56F8014
Data Bus Width
16 bit
Interface Type
RS-232
For Use With/related Products
56F8014
For Use With
APMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6.3.9.6
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.3.9.7
6.3.9.8
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.3.9.9
6.3.9.10
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.3.9.11
6.3.10
The I/O Short Address Location registers are used to specify the memory referenced via the I/O short
address mode. The I/O short address mode allows the instruction to specify the lower six bits of address;
the upper address bits are not directly controllable. This register set allows limited control of the full
address, as shown in
Freescale Semiconductor
1 = Clocks to the Quad Timer module are enabled
0 = The clock is not provided to the SCI module (the SCI module is disabled)
1 = Clocks to the SCI module are enabled
0 = The clock is not provided to the SPI module (the SPI module is disabled)
1 = Clocks to the SPI module are enabled
0 = The clock is not provided to the PWM module (the PWM module is disabled)
1 = Clocks to the PWM module are enabled
I/O Short Address Location Register (SIM_IOSAHI and
SIM_IOSALO)
Reserved—Bit 5
SCI IPBus Clock Enable (SCI)—Bit 4
Reserved—Bit 3
SPI Clock Enable (SPI)—Bit 2
Reserved—Bit 1
PWM Clock Enable (PWM)—Bit 0
Figure
6-12.
56F8014 Technical Data, Rev. 11
Register Descriptions
75

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