DEMO56F8014-EE Freescale Semiconductor, DEMO56F8014-EE Datasheet - Page 71

BOARD DEMO FOR 56F8014

DEMO56F8014-EE

Manufacturer Part Number
DEMO56F8014-EE
Description
BOARD DEMO FOR 56F8014
Manufacturer
Freescale Semiconductor
Type
MCUr

Specifications of DEMO56F8014-EE

Contents
*
Processor To Be Evaluated
MC56F8014
Data Bus Width
16 bit
Interface Type
RS-232
For Use With/related Products
56F8014
For Use With
APMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6.3.8
All of the peripheral pins on the 56F8014 share their Input/Output (I/O) with GPIO ports. To select
peripheral or GPIO control, program the corresponding bit in the GPIOx_PEREN register in the GPIO
module. (See MC56F8000RM, the 56F801x Peripheral Reference Manual, for details.) In some cases,
there are two possible peripherals as well as the GPIO functionality available for control of the I/O. In these
cases, the SIM_GPS register is used to determine which peripheral has control when the corresponding
I/O pin is configured in peripheral mode.
As shown in
pin controls the I/O. SIM_GPS simply decides which peripheral will be routed to the I/O when
PEREN = 1.
6.3.8.1
This bit selects the clock speed for the Quad Timer module.
Freescale Semiconductor
Base + $B
RESET
01101 = Reserved for factory test—Continuous peripheral clock
01110 = Reserved for factory test—Continuous inverted peripheral clock
01111 = Reserved for factory test—Continuous high-speed peripheral clock
0 = Quad Timer module clock rate equals system clock rate, to a maximum 32 MHz (default)
1 = Quad Timer module clock rate equals three times sytem clock rate, to a maximum 96 MHz
Write
Read
SIM GPIO Peripheral Select Register (SIM_GPS)
Quad Timer Clock Rate (TCR)—Bit 15
Figure
TCR
15
0
Figure 6-9 Overall Control of Pads Using SIM_GPS Control
Figure 6-10 GPIO Peripheral Select Register (SIM_GPS)
6-9, the GPIO Peripheral Enable Register (PEREN) has the final control over which
PCR
14
Quad Timer Controlled
0
13
0
0
SCI Controlled
12
0
0
SIM_GPS Register
CFG_
11
B7
0
56F8014 Technical Data, Rev. 11
GPIO Controlled
CFG_
10
B6
0
CFG_
B5
9
0
0
1
GPIOB_PEREN Register
CFG_
B4
8
0
CFG_
B3
7
0
0
1
CFG_
B2
6
0
I/O Pad Control
CFG_
B1
5
0
CFG_
B0
4
0
3
0
CFG_A5
2
0
Register Descriptions
1
0
CFG_A4
0
0
71

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