DSP56F800DEMO-E Freescale Semiconductor, DSP56F800DEMO-E Datasheet - Page 12

KIT EVAL FOR DSP56F800 W/UPS

DSP56F800DEMO-E

Manufacturer Part Number
DSP56F800DEMO-E
Description
KIT EVAL FOR DSP56F800 W/UPS
Manufacturer
Freescale Semiconductor
Type
DSPr
Datasheets

Specifications of DSP56F800DEMO-E

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
56F80x
Data Bus Width
16 bit
Interface Type
RS-232
Operating Supply Voltage
9 V
Silicon Manufacturer
Freescale
Core Architecture
56800/E
Core Sub-architecture
56800/E
Silicon Core Number
MC56F
Silicon Family Name
MC56F80xx
Kit Contents
Demo Board, Cables, CD & Documents
Rohs Compliant
No
For Use With/related Products
DSP56F800
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Definitions, Acronyms, and Abbreviations
Definitions, acronyms and abbreviations for terms used in this document are defined below for
reference.
ADC
CTS
ESD
GPIO
JTAG
OnCE
PC
POT
PWM
RTS
References
The following sources were referenced to produce this manual:
DSP56800 Family Manual
DSP56F80x User’s Manual
Technical Data, 56F801 16-Bit Digital Signal Controller
6
TM
Analog-to-Digital Converter
Clear To Send
Electrostatic Discharge
General Purpose Input and Output Port
Joint Test Action Group. A bus protocol/interface used for test and
debug.
On-Chip Emulation, a debug bus and port created by Freescale to enable
designers to create a low-cost hardware interface for a professional
quality debug environment.
Personal Computer
Potentiometer
Pulse Width Modulation
Request To Send
56F800 Demonstration Board User’s Manual, Rev. 0
Freescale Semiconductor

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