ADSP-3PARCBF548E02 Analog Devices Inc, ADSP-3PARCBF548E02 Datasheet - Page 65

• Manufacturer Part Number: ADSP-3PARCBF548E02
• Description: KIT DEV STARTER BF548
• Manufacturer: Analog Devices Inc
• Series: Blackfin®r
• Type: DSPr

Specifications of ADSP-3PARCBF548E02

• Contents: Board, Cables, CD, Headset with Microphone, Module, Power Supply
• For Use With/related Products: ADSP-BF548
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Serial Peripheral Interface (SPI) Port—Slave Timing
Table 46
Table 46. Serial Peripheral Interface (SPI) Port—Slave Timing
Parameter
Timing Requirements
t
t
t
t
t
t
t
t
Switching Characteristics
t
t
t
t
SPICHS
SPICLS
SPICLK
HDS
SPITDS
SDSCI
SSPID
HSPID
DSOE
DSDHI
DDSPID
HDSPID
and
CPHA = 1
CPHA = 0
Figure 39
SPIxMISO
(OUTPUT)
SPIxMOSI
SPIxMISO
(OUTPUT)
SPIxMOSI
SPIxSCK
SPIxSS
(INPUT)
(INPUT)
(INPUT)
(INPUT)
SPIxSCK High Period
SPIxSCK Low Period
SPIxSCK Period
Last SPIxSCK Edge to SPIxSS Not Asserted
Sequential Transfer Delay
SPIxSS Assertion to First SPIxSCK Edge
Data Input Valid to SPIxSCK Edge (Data Input Setup)
SPIxSCK Sampling Edge to Data Input Invalid
SPIxSS Assertion to Data Out Active
SPIxSS Deassertion to Data High Impedance
SPIxSCK Edge to Data Out Valid (Data Out Delay)
SPIxSCK Edge to Data Out Invalid (Data Out Hold)
t
describe SPI port slave operations.
DSOE
ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549
t
DSOE
t
SDSCI
t
SSPID
t
DDSPID
t
SPICLS
Figure 39. Serial Peripheral Interface (SPI) Port—Slave Timing
t
HDSPID
Rev. C | Page 65 of 100 | February 2010
t
SPICHS
t
HDSPID
t
HSPID
t
DDSPID
t
SSPID
t
DDSPID
t
SPICLK
t
HSPID
t
Min
2t
2t
4t
2t
2t
2t
1.6
1.6
0
0
0
HDS
t
t
DSDHI
DSDHI
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
–1.5
–1.5
–1.5
–1.5
–1.5
t
SPITDS
Max
8
8
10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns