EVAL-ADUC7032QSPZ Analog Devices Inc, EVAL-ADUC7032QSPZ Datasheet - Page 69
![EVAL DEV QUICK START ADUC7032](/photos/9/24/92482/eval-aduc7032qspz_sml.jpg)
EVAL-ADUC7032QSPZ
Manufacturer Part Number
EVAL-ADUC7032QSPZ
Description
EVAL DEV QUICK START ADUC7032
Manufacturer
Analog Devices Inc
Series
QuickStart™ PLUS Kitr
Type
MCUr
Datasheet
1.EVAL-ADUC7032QSPZ.pdf
(116 pages)
Specifications of EVAL-ADUC7032QSPZ
Contents
Evaluation Board, Power Supply, Cable, Software, Emulator and Documentation
For Use With/related Products
ADuC7032
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 69 of 116
- Download datasheet (3Mb)
TIMER0—LIFETIME TIMER
Timer0 is a general-purpose 48-bit count-up, or a 16-bit count-
up/count-down timer with a programmable prescalar. Timer0
can be clocked from either the core clock, the low power
32.768 kHz oscillator, the precision 32.768 kHz oscillator, or an
external 32.768 kHz crystal with a prescalar of 1, 16, 256, or
32,768. This gives a minimum resolution of 48.83 ns when the
core is operating at 20.48 MHz, and with a prescalar of 1.
In 48-bit mode, Timer0 counts up from zero. The current
counter value can be read from T0VAL0 and T0VAL1.
In 16-bit mode, Timer0 can count up or count down. A 16-bit
value can be written to T0LD that is loaded into the counter.
The current counter value can be read from T0VAL0. Timer0
has a capture register (T0CAP) that can be triggered by a selected
IRQ source initial assertion. Once triggered, the current timer
value is copied to T0CAP, and the timer keeps running. This
feature can be used to determine the assertion of an event with
more accuracy than by servicing an interrupt alone.
32.768kHz OSCILLATOR
32.768kHz OSCILLATOR
EXTERNAL 32.768kHz
CLOCK FREQUENCY
WATCH CRYSTAL
LOW POWER
PRECISION
CORE
Figure 30. Timer0 Block Diagram
1, 16, 256, OR 32768
IRQ[31:0]
PRESCALAR
Rev.0 | Page 69 of 116
Timer0 reloads the value from T0LD either when Timer0
overflows, or immediately when T0CLRI is written.
The Timer0 interface consists of the following six MMRs:
•
•
•
•
•
16-BIT UP/DOWN COUNTER
CAPTURE
T0LD: 16-bit register that holds the 16-bit value that is
loaded into the counter. Available only in 16-bit mode
T0CAP: 16-bit register that holds the 16-bit value captured by
an enabled IRQ event. Available only in 16-bit mode.
T0VAL0 and T0VAL1: 16-bit and 32-bit registers that hold
the 16 least significant bits (LSBs) and 32 most significant bits
(MSBs), respectively. T0VAL0 and T0VAL1 are read only.
In 16-bit mode, 16-bit T0VAL0 is used. In 48-bit mode, both
the 16-bit T0VAL0 and 32-bit T0VAL1 are used.
T0CLRI: 8-bit register. Writing any value to this register
clears the interrupt. Available only in 16-bit mode.
T0CON: configuration MMR described in Table 54.
48-BIT UP COUNTER
16-BIT LOAD
TIMER0
VALUE
TIMER0 IRQ
ADuC7032-8L
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