ATSAM3S-EK Atmel, ATSAM3S-EK Datasheet - Page 33
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ATSAM3S-EK
Manufacturer Part Number
ATSAM3S-EK
Description
KIT EVAL FOR ATSAM3S4C
Manufacturer
Atmel
Series
SAM3Sr
Type
MCUr
Specifications of ATSAM3S-EK
Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
ARM
Core Sub-architecture
Cortex-M3
Kit Contents
Board
Features
TFT Colour LCD Display, SD/MMC Interface
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATSAM3S-EK
Manufacturer:
Atmel
Quantity:
135
9.1.3.9
9.1.3.10
9.1.3.11
9.1.4
9.2
9.2.1
6500CS–ATARM–24-Jan-11
External Memories
Boot Strategies
Static Memory Controller
Fast Flash Programming Interface
SAM-BA
GPNVM Bits
®
Boot
The Fast Flash Programming Interface allows programming the device through either a serial
JTAG interface or through a multiplexed fully-handshaked parallel port. It allows gang program-
ming with market-standard industrial programmers.
The FFPI supports read, page program, page erase, full erase, lock, unlock and protect
commands.
The Fast Flash Programming Interface is enabled and the Fast Programming Mode is entered
when TST and PA0 and PA1are tied low.
The SAM-BA Boot is a default Boot Program which provides an easy way to program in-situ the
on-chip Flash memory.
The SAM-BA Boot Assistant supports serial communication via the UART and USB.
The SAM-BA Boot provides an interface with SAM-BA Graphic User Interface (GUI).
The SAM3S features two GPNVM bits that can be cleared or set respectively through the com-
mands “Clear GPNVM Bit” and “Set GPNVM Bit” of the EEFC User Interface.
Table 9-2.
The system always boots at address 0x0. To ensure maximum boot possibilities, the memory
layout can be changed via GPNVM.
A general-purpose NVM (GPNVM) bit is used to boot either on the ROM (default) or from the
Flash.
The GPNVM bit can be cleared or set respectively through the commands “Clear General-pur-
pose NVM Bit” and “Set General-purpose NVM Bit” of the EEFC User Interface.
Setting GPNVM Bit 1 selects the boot from the Flash, clearing it selects the boot from the ROM.
Asserting ERASE clears the GPNVM Bit 1 and thus selects the boot from the ROM by default.
The SAM3S features an External Bus Interface to provide the interface to a wide range of exter-
nal memories and to any parallel peripheral.
• 8-bit Data Bus
• Up to 24-bit Address Bus (up to 16 MBytes linear per chip select)
• Up to 4 chip selects, Configurable Assignment
• Multiple Access Modes supported
GPNVMBit[#]
– Chip Select, Write enable or Read enable Control Mode
0
1
General Purpose Non-volatile Memory Bits
Function
Security bit
Boot mode selection
SAM3S Summary
33