EA-OEM-306 Embedded Artists, EA-OEM-306 Datasheet - Page 13

• Manufacturer Part Number: EA-OEM-306
• Description: KIT LPC3152 SODIMM 66X48 200POS
• Manufacturer: Embedded Artists
• Type: MCUr

Specifications of EA-OEM-306

• Contents: Base Board, Cable, Headset, OEM Board, Serial Number
• For Use With/related Products: LPC3152
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
Table 4.
Pin names with prefix m are multiplexed pins. See
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
LPC3152_3154
Preliminary data sheet
TFBGA pin name
PSU_STOP
PSU_VBAT1
PSU_VBAT2
PSU_VBAT
Li-Ion charger
CHARGE_VNTC
CHARGE_VSS
CHARGE_CC_REF
CHARGE_VBUS
CHARGE_BAT_SENSE
CHARGE_VBAT
USB charge pump (host mode)
UOS_VSS
UOS_VBUS
UOS_VBAT
UOS_CX2
UOS_CX1
Pulse Width Modulation module
PWM_DATA
Digital IO levels are explained in
I = input; I:PU = input with internal weak pull-up; I:PD = input with internal weak pull-down; O = output.
Cell types are explained in
Pin can be configured as GPIO pin in the IOCONFIG block.
GPIO3 is driven HIGH if the boot process fails. It is recommended to connect GPIO3 to PSU_STOP, so that the LPC3152/3154 will be
powered down and further access prevented if the boot ROM detects an error.
The UART flow control lines (mUART_CTS_N and mUART_RTS_N) are multiplexed. This means that if these balls are not required for
UART flow control, they can be selected to be used for their alternative function: SPI chip select signals (SPI_CS_OUT1 and
SPI_CS_OUT2).
The polyfuses get unintentionally burned at random if VPP is powered to 2.3 V or greater before the VDDI is powered up to minimum
nominal voltage. This will destroy the sample, and it can be locked (security) and the AES key can be corrupted. For this reason it is
recommended that VPP be powered by SUP1 at power-on.
To ensure that GPIO0, GPIO1 and GPIO2 pins come up as inputs, pins TRST_N and JTAGSEL must be LOW at power-on reset, see
UM10315 JTAG chapter for details.
Pin description
[4]
TFB
GA
ball
D15
H17
F17
E16
J17
J15
K15
J14
K17
K16
N17
P15
P16
P17
R17
D10
Table
…continued
Table
6.
Digital
I/O
level
[1]
SUP3
SUP6
SUP6
SUP6
-
-
-
SUP5
-
SUP6
-
SUP5
SUP6
-
-
SUP3
5.
All information provided in this document is subject to legal disclaimers.
Application
function
AIO
Supply
Supply
Supply
AI
Ground
AO
Supply
AI
AO
Ground
AO
Supply
AIO
AIO
DO/GPIO
Rev. 0.12 — 27 May 2010
Table 11
Pin
state
after
reset
I
O
for pin function selection of multiplexed pins.
[2]
Cell type
[3]
AIO2
CS1
CS1
CS1
AIO2
CG1
CS1
CS1
AIO2
CS1
CG1
CS1
CS1
CS1
CS1
DIO1
Description
PSU stop signal input (active HIGH)
PSU DCDC1 supply input
PSU DCDC2 supply input
PSU Li-ion battery input
Charger NTC connection
Charger ground Li-Ion
Charger constant current reference
Charger 5 V supply
Charger battery sense terminal
Charger positive battery terminal connection
USB charge pump ground
USB charge pump output to USB_VBUS
USB charge-pump supply Li-ion battery input
USB charge-pump capacitor terminal for
voltage converter
USB charge-pump capacitor terminal for
voltage converter
PWM output
LPC3152/3154
© NXP B.V. 2010. All rights reserved.
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