BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 2

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TMPA900CMXBG / TMPA901CMXBG
Key Features:
Built-in functions:
A new Microcontroller combines a 32-bit ARM processor with graphics control and processing
functionality to simplify display applications
The TMPA9x family brings together a high-performance 32-bit core, with comprehensive graphics control and
processing functionality, and a variety of on-board connectivity and peripheral options. These new devices
considerably reduce the development time and component count.
The new low power products feature an ARM926EJ-CPU™ core, LCD controller with image process accelerator,
touch screen interface, CMOS image sensor input, USB Device and Host, SD Host Controller and further
comprehensive connectivity options.
Core
Operating voltage
Max. operating freq.
Internal memory
Debug circuit
Power saving operation
SD Host Controller
LCD Ctrl.
LCDA
USB Device
USB Host
10 bit A/DC
Touch screen I/F
16 bit timer
I/O
RTC
CMOS-Camera I/F
Serial interfaces
Memory I/F
DMA
OFD
PMC
Package
Original
Introduction
LCD Accelerator
Normal Expansion Picture
Expansion Size
Process time
(1 Frame)
(pixels)
Scaling
ARM926EJ-S, 16kB I$ and 16kB D$
I/O=1.7~3.9V, 3,0V ~3,6V
200MHz @ 0～70°C, 150MHz @ -20～+85°C
Boot-ROM:16kB, RAM: 32kB
JTAG Interface
Clock gear (f/2, f/4 or f/8)
Standby mode (NORMAL/Power Cut Mode)
Hi-speed, 50MHz, High Capacity, 32GB
Mono, STN Color, 16/24bit TFT Color
Display Data Accelerator supports
Scaling, Blending and Rotation
High speed (480Mbps)
Full speed (12Mbps)
8ch (3.0-3.6V), 1.39µs
1ch
6ch (2ch PWM output)
91 (43 @TMPA901)
1ch
(CMSI) Up to 1,3Mpixel,
YUV-to-RGB conversion (only TMPA900)
SSP(SPI) x 2ch (1ch @TMPA901)
UART x 3ch (2ch @TMPA901)
I
I
16/32bit SDR SDRAM
16/32bit DDR SDRAM
NAND Flash 8bit bus (SLC/4LC)
8ch
Oscillation Frequency Detector (IEC60730)
Power Management Circuit
TMPA900: FBGA289
TMPA901: FBGA177
2
2
C x 2ch (1ch @TMPA901)
S x 2ch (1ch @TMPA901)
Bi-Cubic Method
2,31ms 3,27ms 4,61ms 9,22ms 11,53ms
320*240
(QVGA)
(WQVGA)
400*272
(WQVGA)
(15mmx15mm 0.8mm ball pitch)
(13mmx13mm 0.8mm ball pitch)
400*240
640*480
(VGA)
- 2 -
800*480
(WVGA)
Brightness
Control
Picture 1
Blending
Picture Mix
Picture 2
Control
Color
O
s
e
t
f
A
T
f
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c