XE8000EV104 Semtech, XE8000EV104 Datasheet - Page 49

EVAL BOARD FOR XE8805AMI028LF

XE8000EV104

Manufacturer Part Number
XE8000EV104
Description
EVAL BOARD FOR XE8805AMI028LF
Manufacturer
Semtech
Type
MCUr
Datasheets

Specifications of XE8000EV104

Contents
Fully Assembled Evaluation Board
For Use With/related Products
XE88LC05AMI028
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
7.6 Clock source selection
There are three possible clock sources available for the CPU clock. The RC clock is always selected after power-
up or after Sleep mode. The CPU clock selection is done with the bit CpuSel in RegSysClock (0= RC clock, 1= 32
kHz from Xtal if EnableXtal =1, ExtClk = 0 and EnExtClk = 0 else external clock).
Switching from one clock source to another is glitch free.
The next table summarizes the different clock configurations of the circuit:
Note 1: The CPU clock can be divided by using the freq instruction (see coolrisc instruction set)
Switching from one clock source to another and stopping the unused clock source must be performed using 3
MOVE instructions to RegSysClock. First select the new clock source, secondly change the CpuSel bit and finally
stop the unused one.
7.7 RegSysMisc Description
The RCOnPA0 bit in RegSysMisc can be used to enable the RC oscillator on an event external to the circuit. If
RCOnPA0 is 1, the RC oscillator is enabled (EnableRC bit is set to 1) as soon as the value on port A pin PA[0] is
equal to 1. The port A pin can be debounced (see port A documentation).
Bit OutputCkXtal allows to show the Xtal clock on PB[3]. The EnableXtal bit must be set to 1 else PB[3] equals 0
(see port B documentation to set up the port B).
Bit OutputCpuCk allows to show the CpuClock on PB[2] (see port B documentation).
© Semtech 2006
Bit DebFast in the RegSysMisc register allows to chose the debouncer clock between 256Hz and 8kHz (DebFast
= 0 and DebFast = 1 respectively). The Debouncer clock is used to debounce PA inputs (see port A
documentation).
Mode
name
Sleep
Xtal
RC
RC + Xtal
External
RC
External
Clock Sources
+
0
0
0
0
1
1
0
0
1
1
0
1
Table 7-12: Table of clocking modes.
X
X
0
1
0
1
CpuSel=0
RC
RC
RC
Off
Off
Off
7-8
Cpuck
Note 1
CpuSel=1
External
External
Xtal
Xtal
RC
Off
Clock targets
Prescaler
Clock
input
High
RC
RC
RC
Off
Off
Off
High presc.
High presc.
Prescaler
XE8805/05A
Clock
input
Low
Xtal
Xtal
Off
Off
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