ATSTK600 Atmel, ATSTK600 Datasheet - Page 5

• Manufacturer Part Number: ATSTK600
• Description: DEV KIT FOR AVR/AVR32
• Manufacturer: Atmel
• Series: AVR®r
• Type: MCUr

Specifications of ATSTK600

• Processor To Be Evaluated: AVR and AVR32
• Data Bus Width: 8 bit
• Interface Type: RS-232, USB
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: AVR UC3
• Silicon Core Number: STK600
• Silicon Family Name: AVR
• Kit Contents: Board
• Rohs Compliant: Yes
• For Use With/related Products: Atmel AVR Devices
• For Use With: ATSTK600-ATTINY10 - STK600-ATTINY10 SOCKET PACKAGE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Contents: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

AT32AP7001 Blockdiagram
Family Overview AT32AP7001
The AT32AP7001 is a device reduction of the full-fledged AP7000 related to some
peripherals. It can be used in applications where no Ethernet connection and no
process visualization are needed. The AP7001 can be used for applications deployed
in cell phones, digital cameras, automotive infotainment, process automation, set
top boxes, and home entertainment systems. The embedded Pixel-Coprocessor
accelerates processing of images and video streams and is directly connected to the
core to perform single cycle execution on processor speed.
The AT32AP7001 operates at 210 MIPS with a 150 MHz clock. It features 32K bytes
of SRAM directly connected to the high-speed bus matrix, an external bus interface
with controllers for SDRAM and static memories including NAND Flash and Com-
pactFlash™ with ECC. Its extensive peripheral set includes a USB High Speed De-
vice interface, Image Sensor Interface, Multimedia Card Interface (MCI), Synchro-
nous Serial Controllers (SSC), USARTs, Master/Slave Serial Peripheral Interfaces
(SPI), two three-channel 16-bit Timer Counter (TC), and a Two Wire Interface (TWI).
Up to three GPIO Controller (each 32-bit wide) are selecting general I/O’s or do
connect the peripherals to dedicated pins via multiplexer. Peripheral DMA channels
maximize the data throughput between these interfaces and the on- and off-chip
memories.
The AT32AP7001 is available in a 208-ball QFP RoHS-compliant package
AT32AP7000 Development Tools
AP7000 is supported by the ATSTK1000 evaluation kit and AT90JTAGICE-mkII
debugger. Also an ultra low-cost Network Reference Design Kit ATNGW100 with
pre-installed Linux Image is available.
All related Software and documentation may be downloaded via www.atmel.com/
products/avr32 :
ATSTK1000 is equipped with AT32AP7000-CTUT (CTBGA).
MSC’s AT32AP7000-Startup Paket gives you all you need for your first AP7000
design: ATSTK1000, AT90JTAGICE-mkII. The BSP and Linux Kernel is supported by
Atmel and can be downloaded free of cost.
- Ready to use example projects
- Linux demonstration software
- Getting Started Application Notes
- Schematics, BOM and Gerber files
- Free Atmel tools (Linux Kernel and BSP)
Schematics, BOM, Gerber etc. provided by Atmel.
AT23AP7001 in brief
Ext. Bus interface
DataFlash™
Oscillators
Camera IF
Audio DAC
Watchdog
USB UDP
U(S)ART
TWI (I²C)
SD-Card
MMC IF
System
SDRAM
SDRAM
Caches
Debug
SRAM
Flash
16-bit
Flash
Flash
MMU
PWM
AC97
Boot
UHP
CPU
SSC
RTT
PS2
SPI
I/O
ATSTK1000 Resources
ATNGW100 Resources
Evaluation Boards
Communication
Multimedia
Memory
System
NAND (ECC), CompactFlash™
Timer
Misc.
JTAG / Nexus Class III
POR, Shut Down Ctrl.
16-layer AHB Matrix
1 USB2.0 HS Device
Pixel-Coprocessor
16/32-bit dynamic,
8/16/32-bit static,
6 x with Cap/Com
2 x Osc., 2 x PLL
AVR32, 150MHz
16K-I, 16K-D
4 ch / 20-bit
4 with DMA
2 with DMA
3 with DMA
1 (Master)
256MByte
160 max.
2 x 16KB
32MByte
EBI CS0
8MByte
8MByte
8MByte
8MByte
yes
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