CYII4SC014K-EVAL Cypress Semiconductor Corp, CYII4SC014K-EVAL Datasheet - Page 12

• Manufacturer Part Number: CYII4SC014K-EVAL
• Description: BOARD EVAL IMAG SENS IBIS4-14000
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYII4SC014K-EVAL

• Sensor Type: CMOS Imaging, Color (RGB)
• Sensing Range: 14 Megapixel
• Interface: SPI
• Sensitivity: 3 fps
• Voltage - Supply: 3.3V
• Embedded: No
• Utilized Ic / Part: IBIS4-14000
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

SPI Register
SPI Interface Architecture
The elementary unit cell of the serial to parallel interface consists of two D-flip-flops. The architecture is shown in
these cells are connected in parallel, having a common /CS and SCLK form the entire uploadable parameter block, where D
connected to D
Table 6. Timing Requirements Serial Parallel Interface
Document #: 38-05709 Rev. *D
Parameter
CS
Din
SCLK
Tsclk
Th
Ts
out
of the next cell. The uploaded settings are applied to the sensor on the rising edge of signal /CS.
Unity Cell
D
D
C
C
To sensor core
Q
Q
Dout
100 ns
Value
50 ns
50 ns
SCLK
Din
Figure 12. SPI Interface
Data
valid
SCLK
Din
CS
CS
SPI Register Definition
Sensor parameters can be serially uploaded inside the sensor at
the start of a frame. The parameters are:
■
■
■
The code is uploaded serially as a 16-bit word (LSB uploaded
first).
Table 7 on page 13
for a full resolution readout is 33342 (decimal) or 1000 0010 0011
1110.
D0
Subsampling modes for X and Y shift registers (3-bit code for
six subsampling modes)
Power control of the output amplifiers, column amps and pixel
array. Each amplifier can be individually powered up/down
Output crossbar switch control bits. The crossbar switch is used
to route the green pixels to the same output amplifiers at all
times. A first bit controls the crossbar. When a second bit is set,
the first bit toggles on every CLK_Y edge to automatically route
the green pixels of the bayer filter pattern.
Entire uploadable parameter block
16 outputs to sensor core
D1
Tsclk
D2
lists the register definition. The default code
CYII4SM014KAA-GEC
CYII4SC014KAA-GTC
D15
Ts
Figure
Th
Dout
Page 12 of 27
12. 16 of
in
is
[+] Feedback