STEVAL-MKI030V1 STMicroelectronics, STEVAL-MKI030V1 Datasheet - Page 28

• Manufacturer Part Number: STEVAL-MKI030V1
• Description: BOARD DEMO STM8S207R6/LIS331DLH
• Manufacturer: STMicroelectronics
• Series: MEMSr

Specifications of STEVAL-MKI030V1

• Design Resources: STEVAL-MKI030V1 Schematic
• Sensor Type: Accelerometer, 3 Axis
• Sensing Range: ±2g, 4g, 8g
• Interface: I²C, SCI
• Sensitivity: 3.9mg/digit, 2mg/digit, 1mg/digit
• Voltage - Supply: 4.5V
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: LIS331DLH, STM8S207R6T6
• Sensing Axis: Triple Axis
• Operating Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8852

Register description
7.4
7.5
28/38
CTRL_REG3 [Interrupt CTRL register] (22h)
Table 25.
Table 26.
Table 27.
CTRL_REG4 (23h)
Table 28.
Table 29.
IHL
PP_OD
LIR2
I2_CFG1,
I2_CFG0
LIR1
I1_CFG1,
I1_CFG0
BDU
BLE
BDU
IHL
I1(2)_CFG1
0
0
1
1
CTRL_REG3 register
CTRL_REG3 description
Data signal on INT 1 and INT 2 pad
CTRL_REG4 register
CTRL_REG4 description
PP_OD
Block data update. Default value: 0
(0: continuos update; 1: output registers not updated between MSB and LSB reading)
Big/little endian data selection. Default value 0.
(0: data LSB @ lower address; 1: data MSB @ lower address)
BLE
Interrupt active high, low. Default value: 0
(0: active high; 1:active low)
Push-pull/Open drain selection on interrupt pad. Default value 0.
(0: push-pull; 1: open drain)
Latch interrupt request on INT2_SRC register, with INT2_SRC register cleared by
reading INT2_SRC itself. Default value: 0.
(0: interrupt request not latched; 1: interrupt request latched)
Data signal on INT 2 pad control bits. Default value: 00.
(see table below)
Latch interrupt request on INT1_SRC register, with INT1_SRC register cleared by
reading INT1_SRC register. Default value: 0.
(0: interrupt request not latched; 1: interrupt request latched)
Data signal on INT 1 pad control bits. Default value: 00.
(see table below)
LIR2
FS1
I1(2)_CFG0
Doc ID 15094 Rev 3
0
1
0
1
I2_CFG1
FS0
I2_CFG0
STsign
Interrupt 1 source OR interrupt 2 source
Interrupt 1 (2) source
LIR1
0
INT 1(2) Pad
Boot running
Data ready
I1_CFG1
ST
LIS331DLH
I1_CFG0
SIM