HI5760EVAL1 Intersil, HI5760EVAL1 Datasheet

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HI5760EVAL1

Manufacturer Part Number
HI5760EVAL1
Description
EVALUATION PLATFORM SOIC HI5760
Manufacturer
Intersil
Datasheets

Specifications of HI5760EVAL1

Number Of Dac's
1
Number Of Bits
10
Outputs And Type
1, Differential
Sampling Rate (per Second)
125M
Data Interface
Parallel
Settling Time
35ns
Dac Type
Current
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
HI5760
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Description
The HI5760EVAL1 evaluation board provides a quick and
easy method for evaluating the HI5760, 125 MSPS high
speed DAC. The converter outputs a current into a load
resistor to form a voltage which can be measured by using
the included SMA connector. The amount of current out of
the DAC is determined by an external resistor and either an
internal or external reference voltage. The CMOS digital
inputs have optional external termination resistors. The
evaluation board also includes a VME digital interface that is
compatible with the HSP-EVAL board, so DDS (Direct Digital
Synthesis) can be performed with minimal setup time.
Ordering Information
Functional Block Diagram
HI5760EVAL1
NUMBER
PART
RANGE (
TEMP.
25
REFERENCE
(OPTIONAL)
EXTERNAL
o
C)
SMA1
CONNECTOR
TM
3-1
Evaluation Platform
96PIN
VME
P1
PACKAGE
1-888-INTERSIL or 321-724-7143
Application Note
HI5760EVAL1 Evaluation Board User’s Manual
J3
125MHz
CLOCK
SPEED
10 BITS
CLOCK
AVDD
REF SELECT
|
Intersil and Design is a trademark of Intersil Corporation.
SLEEP
J2
J1
HI5760
DAC
U1
Features
• HI5760, 125 MSPS CMOS DAC
• Simple and Easy to Use
• Standard VME/DSP Interface, HSP-EVAL Compatible
• SMA Outputs
• Easily Selectable Internal or External Reference
Applications
• Single or Multi-Carrier Tone Generation
• Modulated Carrier Generation
• General DAC Performance Evaluation
• Amplitude Modulation Via External Reference
October 1998
IOUTA
SMA2
IOUTB
SMA3
DVDD
AVDD
|
Copyright
©
Intersil Corporation 2000
AN9821.1

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HI5760EVAL1 Summary of contents

Page 1

... TM Application Note Description The HI5760EVAL1 evaluation board provides a quick and easy method for evaluating the HI5760, 125 MSPS high speed DAC. The converter outputs a current into a load resistor to form a voltage which can be measured by using the included SMA connector. The amount of current out of the DAC is determined by an external resistor and either an internal or external reference voltage ...

Page 2

Functional Description Voltage Reference The HI5760 has an internal 1.2V voltage reference with a o 60ppm/ C drift coefficient over the full temperature range of the converter. The REFLO pin (16) selects the reference. Access to pin 16 is provided ...

Page 3

... HI5760 at higher speeds recommended that the user obtain a high speed data generator capable of generating 10-bit patterns at clock speeds least 125MHz. HSP-EVAL/HSP45116DB NUMERICALLY CONTROLLED OSCILLATOR EVAL KIT PC INTERFACE +5V POWER SUPPLY HI5760EVAL1 DAC MODULE HI5760 DAC 50 +5V SMA CABLE POWER SUPPLY SPECTRUM ANALYZER ...

Page 4

... HSP-Eval Setup for DDS Attach the HSP-EVAL and the HSP45116 Daughter Board together. Consult their respective user manuals for details. Connect the HI5760EVAL1 board to the P2 connector of the HSPEVAL board. Then connect these to an IBM compatible PC via the parallel port. Provide power to both boards ...

Page 5

Appendix C Circuit Board Layout 3-5 Application Notes 9821 FIGURE 2. PRIMARY SIDE FIGURE 3. POWER LAYER (2) ...

Page 6

Appendix C Circuit Board Layout 3-6 Application Notes 9821 (Continued) FIGURE 4. GROUND LAYER (3) FIGURE 5. SECONDARY SIDE ...

Page 7

Appendix D Schematic SMA1 EXT_REF 5 (OPTIONAL) VME CONNECTOR (96 PIN) A28 LSB P1-28 A8 C28 P1-8 P1-92 A9 C27 P1-9 P1-91 A10 P1-10 A26 A11 P1-26 P1-11 C28 A12 P1-90 P1-12 A13 A25 P1-13 P1-25 A27 C25 P1-27 P1-89 ...

Page 8

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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