CDB-43L21 Cirrus Logic Inc, CDB-43L21 Datasheet - Page 42

EVAL BOARD FOR CS43L21

CDB-43L21

Manufacturer Part Number
CDB-43L21
Description
EVAL BOARD FOR CS43L21
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB-43L21

Number Of Dac's
2
Number Of Bits
24
Outputs And Type
2, Single Ended
Sampling Rate (per Second)
96k
Data Interface
I²C, SPI™
Dac Type
Voltage
Voltage Supply Source
Analog and Digital
Operating Temperature
-10°C ~ 70°C
Utilized Ic / Part
CS43L21
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
598-1282
CDB-43L21
CS43L21
Function:
These bits select the gain multiplier for the headphone/line outputs. See
“Line Output Voltage Characteris-
tics” on page 14
and
“Headphone Output Power Characteristics” on page
15.
DAC Single Volume Control (DAC_SNGVOL)
Default: 0
Function:
The individual channel volume levels are independently controlled by their respective Volume Control reg-
isters when this function is disabled. When enabled, the volume on all channels is determined by the AOU-
TA Volume Control register and the AOUTB Volume Control register is ignored.
PCMX Invert Signal Polarity (INV_PCMX)
Default: 0
0 - Disabled
1 - Enabled
Function:
When enabled, this bit will invert the signal polarity of the PCM x channel.
DACX Channel Mute (DACX_MUTE)
Default: 0
0 - Disabled
1 - Enabled
Function:
The output of channel x DAC will mute when enabled. The muting function is affected by the DACx Soft and
Zero Cross bits (DACx_SZC[1:0]).
6.6
DAC Control (Address 09h)
7
6
5
4
3
2
1
0
DATA_SEL1
DATA_SEL0
FREEZE
Reserved
DEEMPH
AMUTE
DAC_SZC1
DAC_SZC0
DAC Data Selection (DATA_SEL[1:0])
Default: 00
00 - PCM Serial Port to DAC
01 - Signal Processing Engine to DAC
10 - Reserved
11 - Reserved
Function:
Selects the digital signal source for the DAC. Note: Certain functions are only available when the “Signal
Processing Engine to DAC” option is selected using these bits.
42
DS723A1

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