EVL6566B-65W-QR STMicroelectronics, EVL6566B-65W-QR Datasheet - Page 24

• Manufacturer Part Number: EVL6566B-65W-QR
• Description: BOARD EVAL SMPS FOR L6566B
• Manufacturer: STMicroelectronics
• Type: Power Factor Correctionr

Specifications of EVL6566B-65W-QR

• Main Purpose: AC/DC, Primary Side
• Outputs And Type: 1, Isolated
• Power - Output: 65W
• Voltage - Output: 700V
• Voltage - Input: 8 ~ 23 V
• Regulator Topology: Flyback
• Frequency - Switching: 100kHz
• Board Type: Fully Populated
• Utilized Ic / Part: L6566B
• Input Voltage: 90 V to 265 V
• Output Voltage: 1.8 V to 12 V
• Board Size: 150 mm x 75 mm
• Product: Power Management Modules
• Dimensions: 150 mm x 75 mm
• Lead Free Status / RoHS Status: Lead free by exemption / RoHS compliant by exemption
• Current - Output: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: L6566B
• Other names: 497-10165

Application information
5.3
Note:
24/51
Burst-mode operation at no load or very light load
When the voltage at the COMP pin (9) falls 20 mV below a threshold fixed internally at a
value, V
the MOSFET kept in OFF state and its consumption reduced at a lower value to minimize
Vcc capacitor discharge.
The control voltage now will increase as a result of the feedback reaction to the energy
delivery stop (the output voltage will be slowly decaying), the threshold will be exceeded and
the device will restart switching again. In this way the converter will work in burst-mode with
a nearly constant peak current defined by the internal disable level. A load decrease will
then cause a frequency reduction, which can go down even to few hundred hertz, thus
minimizing all frequency-related losses and making it easier to comply with energy saving
regulations. This kind of operation, shown in the timing diagrams of
others previously described, is noise-free since the peak current is low.
If it is necessary to decrease the intervention threshold of the burst-mode operation, this can
be done by adding a small DC offset on the current sense pin as shown in
page 25
The offset reduces the available dynamics of the current signal; thereby, the value of the
sense resistor must be determined taking this offset into account.
Figure 11. Load-dependent operating modes: timing diagrams
MODE/SC=Open
MODE/SC=VREF
(pin 4)
COMPBM
COMP
(pin 9)
.
V
COMPBM
GD
f
f
sw
osc
, depending on the selected operating mode, the L6566B is disabled with
QR Mode
FF Mode
Valley-skipping Mode
Burst-mode
Burst-mode
Figure 11
FF Mode
Figure 12 on
MODE/SC=Open
MODE/SC=VREF
along with the
QR Mode
hyster.
20 mV
L6566B
t
t
t