ADC128S102EVAL/NOPB National Semiconductor, ADC128S102EVAL/NOPB Datasheet - Page 17

• Manufacturer Part Number: ADC128S102EVAL/NOPB
• Description: BOARD EVALUATION FOR ADC128S102
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of ADC128S102EVAL/NOPB

• Number Of Adc's: 1
• Number Of Bits: 12
• Sampling Rate (per Second): 1M
• Data Interface: Serial
• Inputs Per Adc: 8 Single Ended
• Input Range: 0 ~ 5.25 V
• Power (typ) @ Conditions: 10.7mW @ 1MSPS
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 105°C
• Utilized Ic / Part: ADC128S102
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADC128S102EVAL

load capacitance form a low frequency pole, verify signal in-
tegrity once the series resistor has been added.
2.3 LAYOUT AND GROUNDING
Capacitive coupling between the noisy digital circuitry and the
sensitive analog circuitry can lead to poor performance. The
solution is to keep the analog circuitry separated from the
digital circuitry and the clock line as short as possible.
Digital circuits create substantial supply and ground current
transients. The logic noise generated could have significant
impact upon system noise performance. To avoid perfor-
mance degradation of the ADC128S102 due to supply noise,
do not use the same supply for the ADC128S102 that is used
for digital logic.
Generally, analog and digital lines should cross each other at
90° to avoid crosstalk. However, to maximize accuracy in high
resolution systems, avoid crossing analog and digital lines al-
together. It is important to keep clock lines as short as possi-
ble and isolated from ALL other lines, including other digital
17
lines. In addition, the clock line should also be treated as a
transmission line and be properly terminated.
The analog input should be isolated from noisy signal traces
to avoid coupling of spurious signals into the input. Any ex-
ternal component (e.g., a filter capacitor) connected between
the converter's input pins and ground or to the reference input
pin and ground should be connected to a very clean point in
the ground plane.
We recommend the use of a single, uniform ground plane and
the use of split power planes. The power planes should be
located within the same board layer. All analog circuitry (input
amplifiers, filters, reference components, etc.) should be
placed over the analog power plane. All digital circuitry and I/
O lines should be placed over the digital power plane. Fur-
thermore, all components in the reference circuitry and the
input signal chain that are connected to ground should be
connected together with short traces and enter the analog
ground plane at a single, quiet point.
www.national.com