DS26334DK Maxim Integrated Products, DS26334DK Datasheet - Page 9

• Manufacturer Part Number: DS26334DK
• Description: KIT DESIGN FOR DS26334
• Manufacturer: Maxim Integrated Products

Specifications of DS26334DK

• Main Purpose: Telecom, Line Interface Units (LIUs)
• Utilized Ic / Part: DS26334
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Telecom Clock and Data Test Points
The DS26334DK has high-impedance test points for all the telecom signals that are related to the LIU. These
signals are split up by port number and marked with easy to read silkscreen labels.
connector for port 1. The pinout for this connector is repeated for all 16 ports.
Table 3. Telecom Connector Pinout
Note that the input signals in the telecom connector go from the connector to the on-board FPGA, then to the
DS26334/DS26324. The FPGA was designed to perform specific signal routing functions such as looping back
RPOS to TPOS on a particular port or transferring data from the on-board BERT. If you are using user-defined data
and drive the signal on the connector, be sure to tri-state the input signal in the FPGA.
COULD CAUSE DAMAGE TO THE FPGA!
On-Board Bit Error-Rate Tester (BERT)
The DS26334DK has an on-board bit error-rate tester (BERT) to generate and detect errors in either
pseudorandom or user-defined patterns. The BERT on the DS26334DK is the DS2174. A header for the relevant
signals related to the BERT is located on the board (J22). See
BERT signals are routed into the FPGA and can be muxed into any of the 16 DS26334/DS26324 LIU ports under
software control. For all questions concerning the operation of the on-board BERT, refer to the device data sheet
available online at www.maxim-ic.com/telecom. If you are using user-defined data and driver the signal on the
connector, be sure to tri-state the input signal in the FPGA.
THE FPGA!
Table 4. BERT Connector Pinout
10, 12, 14
2, 4, 6, 8,
10, 12, 14
2, 4, 6, 8,
PIN
PIN
11
13
11
13
1
3
5
7
9
1
3
5
7
9
TCLK_EN
NAME
RPOS
RNEG
RCLKEN
TPOS
TNEG
RLOS
RCLK
TCLK
RCLKIN
TCLKIN
GND
TCLKO
NAME
RDAT
TDAT
GND
Transmit Negative Data Input
Receive Positive Data Output
Receive Loss-of-Signal Output
Transmit Clock Input
Ground
Receive Clock Output
Transmit Positive Data Input
Receive Positive Data Output
BERT TCLK Enable
BERT TCLK Input
BERT TCLK Output
BERT RCLK Input
BERT RCLK Enable
BERT TDAT Output
BERT RDAT Input
Ground
FUNCTION
FUNCTION
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FAILURE TO DO SO COULD CAUSE DAMAGE TO
Table 4
for the pinout of the BERT connector. The
Table 3
FAILURE TO DO SO
shows the telecom