LMX2433EVAL National Semiconductor, LMX2433EVAL Datasheet - Page 8

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LMX2433EVAL

Manufacturer Part Number
LMX2433EVAL
Description
EVALUATION BOARD FOR LMX2433
Manufacturer
National Semiconductor
Series
PLLatinum™r
Datasheets

Specifications of LMX2433EVAL

Main Purpose
Timing, Frequency Synthesizer
Embedded
No
Utilized Ic / Part
LMX2433
Primary Attributes
Dual Fractional-N PLL
Secondary Attributes
3.6GHz, CodeLoader Graphical User Interface
Lead Free Status / RoHS Status
Not applicable / Not applicable
Other names
*LMX2433EVAL
LMX2433SLE EVALUATION BOARD OPERATING INSTRUCTIONS
2.5
Lock Time Measurement Using A Spectrum Analyzer
The principle behind this is to use the spectrum analyzer as an FM demodulator to detect the
frequency change over time when the PLL is switching between two frequencies. This method is
called the Zero-Span mode. The idea is to convert the FM of the signal to amplitude variations
and then measure these variations over time. The center frequency of the spectrum analyzer is
first set to the final (settling) frequency. The frequency span and resolution bandwidth are both
set to 10 kHz, and the video bandwidth is set to 100 kHz. The scale is set to 2 dB per division and
the step size is set to 1 kHz per division. A filter response is displayed. The spectrum analyzer is
tuned off the center frequency so that the slope of the tunable filter is used as an FM to AM
converter. The linear section (slope) of the filter is at 5 kHz from the center frequency. The slope
is approximately 1 dB/ 1 kHz. The frequency span is finally set to 0 Hz. A sweep time of 30 msec
is used.
A x1 probe is used to connect the MICROWIRE to the external trigger on the rear panel of the
spectrum analyzer. Using the CodeLoader software, port address ‘C1’ is selected for the
TRIGGER programming pin. The TRIGGER is then set to HIGH. Using the Burst Mode menu of
the software, a macro is created to program the LMX2433SLE device to switch between the
maximum and minimum frequency alternately over time. It is necessary to include a sufficient
delay, such as 10000000, after each programming command. Refer to the Burst Mode Tab
section in the CodeLoader 2 Operating Instructions from National Semiconductor’s Wireless
Communications website: http://wireless.national.com/. The lock time is the time difference
between the point the frequency starts to change (T1), and the point the PLL frequency settles
within +/- 1 kHz range (T2), i.e. lock time = T2 – T1. The single sweep feature of the spectrum
analyzer can be used to capture the trace. (+/- 1 kHz tolerance corresponds to +/- 1 dB from the
settling frequency).
Due to a maximum frequency range specification of 2.5GHz, the modulation domain analyzer
cannot be used for the RF lock time measurement. Do to component tolerances, the maximum of
some Vail 690-3300T VCOs used will not reach 3270 MHz with a tuning voltage of 2.0V. The
2.0V is 0.5V below the Vcc (3.0V) supply, which is the minimum delta specification in the
datasheet. Figure 4.1.6 and 4.1.7 shows lock times to and from 3270 MHz. On instances where
VCO does not reach 3270 MHz, use 3250 MHz for the maximum frequency. Other than the
frequency the waveform should be the same as shown in Figure 4.1.6.
6
LMX2433SLEFPEB
February 8,2006

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